PCaPAC2018 - List of Keywords (FPGA)

Paper	Title	Other Keywords	Page
WEP22	The Lens Effect in the Secondary Emission Based Systems of Joint Searching in EBW	electron, target, gun, experiment	83
	A.M. Medvedev, K.A. Blokhina, M.G. Fedotov, Yu.I. Semenov, M. M. Sizov, A.A. Starostenko, A.S. Tsyganov BINP SB RAS, Novosibirsk, Russia M.G. Fedotov, A.M. Medvedev, A.A. Starostenko NSU, Novosibirsk, Russia
	The results of developed scan lines generator for the magnetic correctors system are presented. Get the dependency between various types of the scan lines and distribution of the allocated energy in the electron beam welding facility. The lens effect in the secondary emission based system of joint searching, using 3-fragment linear scan line is received. The accuracy of the joint searching system (the error of positioning system) is 0.05 mm, the lens effect can decrease this value several times. The requirements for the creation full calibrated system of joint searching are listed.
	Poster WEP22 [6.704 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-WEP22
About •	paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA1	Quest for the New Standard PSI IOC Platform	EPICS, Linux, controls, operation	119
	D. Anicic PSI, Villigen PSI, Switzerland
	With its four accelerator facilities the Paul Scherrer Institut (PSI) has already several decades of control system Input Output Computer (IOC) experience. The technology is moving forward fast. The older hardware is becoming obsolete: it is slow, consumes too much power, does not match new computing, networking and bus technologies, and replacements can no longer be purchased as models have been discontinued. All this forces us to opt for a new "standard" IOC platform with increasing regularity. What used to be twenty years, became ten, and is now tending towards five years. Here we present past and possible future IOC platforms which we are investigating. Feedback from the conference would be highly appreciated.
	Slides THCA1 [3.691 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA1
About •	paper received ※ 08 October 2018 paper accepted ※ 17 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA2	Development of MicroTCA-based Low-level Radio Frequency Control Systems for cERL and STF	cavity, LLRF, controls, linac	124
	F. Qiu, T. Matsumoto, S. Michizono, T. Miura KEK, Ibaraki, Japan
	Low-level radio frequency (LLRF) control systems based on µTCA standard have been developed for facilities such as compact energy recovery linac (cERL) and superconducting test facility (STF) at the High Energy Accelerator Research Organization (KEK), Japan. Three different types of boards were developed according to their different applications. Experimental physics and industrial control system (EPICS) was selected as the data communication system for all of these µTCA boards. The LLRF systems showed good performance during the beam commissioning. This paper presents the current status of the µTCA-based LLRF systems in the cERL and STF.
	Slides THCA2 [2.000 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA2
About •	paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA4	Development of a Network-based Timing and Tag Information Distribution System for Synchrotron Radiation Experiments at SPring-8	timing, network, software, experiment	131
	T. Masuda JASRI/SPring-8, Hyogo, Japan
	Time-resolved measurements in synchrotron radiation experiments require an RF clock of a storage ring accelerator and a fundamental revolution frequency (zero address) signal. For the usage of these signals around the experimental station, long RF cables from the accelerator timing station, divider modules and delay modules must be deployed. These installations need a lot of cost and require a lot of efforts to adjust the timing by experts. To lower these costs and efforts, the revolution frequency, which is ~209 kHz at the SPring-8 storage ring, and tag information distribution system has been studied based on a high precision time synchronization technology over a network. In this study, the White Rabbit* (WR) technology is adopted. The proof of concept system has been built, which consists of a master PC, a slave PC and two WR switches. The master PC detects the zero-address signal and distributes the time stamps with tag information to the slave PC. Then the slave PC generates the ~209 kHz signals synchronized with the target bunch by adding the offset time by software. The measured one-σ jitter of the output signals from the slave PC has been achieved less than 100 ps. * https://www.ohwr.org/projects/white-rabbit
	Slides THCA4 [3.309 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA4
About •	paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP08	Design and Implementation of Stepper Motor Control of the LINAC High Power RF System Based on FPGA	controls, GUI, electron, software	179
	R. Rujanakraikarn, Ch. Dhammatong, W. Phacheerak SLRI, Nakhon Ratchasima, Thailand
	In this paper, the new motion control system that governs the position of high power attenuators and phase shifters in the linac’s RF system at SLRI is described. The drive system, which was originally driven by a set of AC reversible motors, is replaced by a new set of stepper motors. The hardware selection and installation is presented in detail. The digital control circuits are designed in VHDL and implemented on a commercial Field Programmable Gate Array (FPGA) board. The main software part, implemented in MicroBlaze Microcontroller System (MCS), is coded in C to control the position of stepper motors relative to the DC voltage reference points of the hardware system. A LabVIEW GUI is designed to interface with the control system to provide reference points and display position values via RS-232 and PLC interfaces. This stepper motor control system can be used to effectively implement the phase and amplitude control system of the linac’s RF signals in the future.
	Slides THP08 [1.190 MB]
	Poster THP08 [3.752 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP08
About •	paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP10	Collimator Motion Control System Upgrade for Medical Linear Accelerator Project at SLRI	controls, software, hardware, interface	183
	R. Rujanakraikarn, P. Koonpong, S. Tesprasitte SLRI, Nakhon Ratchasima, Thailand
	A prototype of the 6-MeV medical linear accelerator has been under development at Synchrotron Light Research Institute (SLRI). A set of secondary collimators is utilized with different size arrangement for beam shaping purpose. To produce the desired field size of the beam, the FPGA-based collimator motion control is designed in VHDL for simultaneous control of the collimators while the main PI control is implemented in the FPGA’s main processor. In this paper, hardware and software upgrades of the collimator motion control system are presented. A custom drive hardware for individual collimator is designed to implement with the existing FPGA controller board. Interface between the custom hardware parts and the FPGA’s programmable logic (PL) part is described. Communication between the motion control subsystem and the main LabVIEW control software on PC is modified to send and receive parameters wirelessly. Software modification of the FPGA’s main processor part and that of the LabVIEW GUI part is also reported.
	Poster THP10 [3.877 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP10
About •	paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP13	The Development of a FPGA Based Front End Safety Interlock System	controls, real-time, EPICS, status	189
	J.-Y. Chuang, C.-C. Chang, C.M. Cheng, Y.Z. Lin, I.C. Sheng, Y.C. Yang NSRRC, Hsinchu, Taiwan
	A front end (FE) safety interlock control system was designed to protect humans and the machine integrity during operation. Since stability and reliability are an important requirement in this system, we developed a FPGA based system to control a safety logic for interlock protection. The integration of the FPGA, Real-time and redundant fail-safe system in the FE interlock system enables us to provide a safe protection with EPICS com-munication and hardware protection functions.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP13
About •	paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP15	Design and Implementation of FPGA Based Protection System for Beam Acceleration in Linear IFMIF Prototype Accelerator	controls, EPICS, operation, rfq	195
	Y. Hirata, A. Kasugai QST, Aomori, Japan A. Jokinen, A. Marqueta Fusion for Energy, Garching, Germany H. Takahashi JAEA/J-PARC, Tokai-Mura, Naka-Gun, Ibaraki-Ken, Japan
	IFMIF (International Fusion Materials Irradiation Facility) Prototype Accelerator (LIPAc) has been developed, which is designed to produce a deuteron CW beam with a current of 125 mA at 9 MeV. After the injector commissioning, the LIPAc is entering in the second commissioning phase in which RFQ, MEBT, RF Power System and Beam Instrumentation (BI) systems have been integrated. The LCSs of LIPAc have been developed by European Home Team (EU-HT) and delivered with its subsystems; the CCS, including personnel and machine protection, timing, archiving and alarming, by Japanese Home Team (JA-HT). These have been implemented on the EPICS platform to mitigate the risk of incompatibility in the integration, which JA-HT and EU-HT are jointly carrying out to control the whole accelerator. In the CCS, some interlocks associated with measurement systems–chopper interlock, protection of BI systems, etc.–are implemented on FPGA and the condition of interlock triggering can be changed from EPICS OPIs depending on the beam conditions. The use of EPICS interface can add flexibility but still satisfy fast response and reliability requirement. The design and implementation will be presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP15
About •	paper received ※ 10 October 2018 paper accepted ※ 17 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP21	Development of Triggered Scaler to Detect Miss-Trigger	operation, EPICS, timing, controls	213
	N. Kamikubota KEK, Ibaraki, Japan K.C. Sato J-PARC, KEK & JAEA, Ibaraki-ken, Japan Y. Tajima KIS, Ibaraki, Japan S.Y. Yoshida Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan
	A "triggered scaler" has been developed for J-PARC accelerators. It is a PLC-type scaler with memory-buffers. Number of pulsed signals is counted and stored in a cell of memory-buffer, then, each external trigger (25 Hz) shifts the pointer to the cell. The buffer size (192) is designed to store one machine-cycle (2480 ms or 5200 ms in J-PARC). Demonstrative measurements using a prototype module are reported. In addition, scheme to detect miss-trigger events are discussed.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP21
About •	paper received ※ 21 October 2018 paper accepted ※ 08 November 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP22	Guaranteeing the Measurement Accuracy in Em#*	impedance, ISOL, target, synchrotron	216
	X. Serra-Gallifa, J.A. Avila-Abellan, M. Broseta, G. Cuní, O. Matilla ALBA-CELLS Synchrotron, Cerdanyola del Vallès, Spain
	ALBA, in collaboration with MAXIV, has developed a four-channel electrometer of 18bit deep with 8 ranges from 1mA to 100pA. The objective of accuracy in the measurements made clear from the beginning the need to compensate the components tolerances and its dependence with temperature. This paper describes the tests performed to characterize the acquisition chain, the automatic calibration developed and the hardware and software implemented to achieve the accuracy target. This implementation has been eased due to the high flexibility given by ALIN and Harmony** architectures used in the Em#. * J.Avila-Abellan, "Em# Electrometer Comes to Light", ICALEPCS’17. ** M.Broseta, "Present and Future of Harmony Bus, a real-time high speed bus for data transfer between FPGA cores", ICALEPCS’17.
	Poster THP22 [1.037 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP22
About •	paper received ※ 10 October 2018 paper accepted ※ 16 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

FRCB1	Ultra Fast Data Acquisition in ELI Beamlines	laser, interface, controls, data-acquisition	230
	P. Bastl Institute of Physics of the ASCR, Prague, Czech Republic V. Gaman, O. Janda, P. Pivonka, B. Plötzeneder, J. Sys, J. Trdlicka ELI-BEAMS, Prague, Czech Republic
	The ELI Beamlines facility is a Petawatt laser facility in the final construction and commissioning phase in Czech Republic. In fully operation phase, four lasers will be used to control beamlines in six experimental halls. In this paper we describe Ultra fast and distributed data acquisition system as was defined in ELI Beamlines. The data acquisition system is divided into two levels: central and local level. The central level data acquisition system defines a special Tier 0 RAM buffer. This buffer is based on special multi node data acquisition server which shares memory of all its nodes into one continuous space over low latency network technologies (Mellanox Infinband/Intel OmniPath). The main role of the Tier 0 buffer is to acquire first bunch and provide load balancing of incoming data. These data comes from many sources distributed along the experimental technologies. The local data acquisition system is then responsible for connection of local detectors to central data acquisition server through ROCE interface. The connection is done directly when supported or indirectly using local data acquisition computers (for PCIe etc.).
	Slides FRCB1 [1.830 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-FRCB1
About •	paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

FRCC1	FPGA-based Image Processing System for Electron Beam Welding Facility	controls, electron, gun, interface	239
	M. M. Sizov, K.A. Blokhina, A.M. Medvedev, A.A. Starostenko BINP SB RAS, Novosibirsk, Russia A.M. Medvedev NSU, Novosibirsk, Russia
	In this paper image processing system for secondary emission of electrons in electron beam welding facility is described. System runs on Intel Field Programmable Gate Array (FPGA) for digital processing. Time-sensitive algorithms are designed in VHDL and dataflow DSL Caph. Seam finder algorithm and data filters are written in Caph. The system is designed to filter high-frequency noise and estimate seam location for its automatic correction within 2 us. General algorithms for hardware control and data visualization are described with the interface to the FPGA-based part.
	Slides FRCC1 [2.753 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-FRCC1
About •	paper received ※ 10 October 2018 paper accepted ※ 16 October 2018 issue date ※ 21 January 2019
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

WEP22

The Lens Effect in the Secondary Emission Based Systems of Joint Searching in EBW

electron, target, gun, experiment

83

A.M. Medvedev, K.A. Blokhina, M.G. Fedotov, Yu.I. Semenov, M. M. Sizov, A.A. Starostenko, A.S. Tsyganov
BINP SB RAS, Novosibirsk, Russia
M.G. Fedotov, A.M. Medvedev, A.A. Starostenko
NSU, Novosibirsk, Russia

The results of developed scan lines generator for the magnetic correctors system are presented. Get the dependency between various types of the scan lines and distribution of the allocated energy in the electron beam welding facility. The lens effect in the secondary emission based system of joint searching, using 3-fragment linear scan line is received. The accuracy of the joint searching system (the error of positioning system) is 0.05 mm, the lens effect can decrease this value several times. The requirements for the creation full calibrated system of joint searching are listed.

Poster WEP22 [6.704 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-WEP22

About •

paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA1

Quest for the New Standard PSI IOC Platform

EPICS, Linux, controls, operation

119

D. Anicic
PSI, Villigen PSI, Switzerland

With its four accelerator facilities the Paul Scherrer Institut (PSI) has already several decades of control system Input Output Computer (IOC) experience. The technology is moving forward fast. The older hardware is becoming obsolete: it is slow, consumes too much power, does not match new computing, networking and bus technologies, and replacements can no longer be purchased as models have been discontinued. All this forces us to opt for a new "standard" IOC platform with increasing regularity. What used to be twenty years, became ten, and is now tending towards five years. Here we present past and possible future IOC platforms which we are investigating. Feedback from the conference would be highly appreciated.

Slides THCA1 [3.691 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA1

About •

paper received ※ 08 October 2018 paper accepted ※ 17 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA2

Development of MicroTCA-based Low-level Radio Frequency Control Systems for cERL and STF

cavity, LLRF, controls, linac

124

F. Qiu, T. Matsumoto, S. Michizono, T. Miura
KEK, Ibaraki, Japan

Low-level radio frequency (LLRF) control systems based on µTCA standard have been developed for facilities such as compact energy recovery linac (cERL) and superconducting test facility (STF) at the High Energy Accelerator Research Organization (KEK), Japan. Three different types of boards were developed according to their different applications. Experimental physics and industrial control system (EPICS) was selected as the data communication system for all of these µTCA boards. The LLRF systems showed good performance during the beam commissioning. This paper presents the current status of the µTCA-based LLRF systems in the cERL and STF.

Slides THCA2 [2.000 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA2

About •

paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCA4

Development of a Network-based Timing and Tag Information Distribution System for Synchrotron Radiation Experiments at SPring-8

timing, network, software, experiment

131

T. Masuda
JASRI/SPring-8, Hyogo, Japan

Time-resolved measurements in synchrotron radiation experiments require an RF clock of a storage ring accelerator and a fundamental revolution frequency (zero address) signal. For the usage of these signals around the experimental station, long RF cables from the accelerator timing station, divider modules and delay modules must be deployed. These installations need a lot of cost and require a lot of efforts to adjust the timing by experts. To lower these costs and efforts, the revolution frequency, which is ~209 kHz at the SPring-8 storage ring, and tag information distribution system has been studied based on a high precision time synchronization technology over a network. In this study, the White Rabbit* (WR) technology is adopted. The proof of concept system has been built, which consists of a master PC, a slave PC and two WR switches. The master PC detects the zero-address signal and distributes the time stamps with tag information to the slave PC. Then the slave PC generates the ~209 kHz signals synchronized with the target bunch by adding the offset time by software. The measured one-σ jitter of the output signals from the slave PC has been achieved less than 100 ps.
* https://www.ohwr.org/projects/white-rabbit

Slides THCA4 [3.309 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THCA4

About •

paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP08

Design and Implementation of Stepper Motor Control of the LINAC High Power RF System Based on FPGA

controls, GUI, electron, software

179

R. Rujanakraikarn, Ch. Dhammatong, W. Phacheerak
SLRI, Nakhon Ratchasima, Thailand

In this paper, the new motion control system that governs the position of high power attenuators and phase shifters in the linac’s RF system at SLRI is described. The drive system, which was originally driven by a set of AC reversible motors, is replaced by a new set of stepper motors. The hardware selection and installation is presented in detail. The digital control circuits are designed in VHDL and implemented on a commercial Field Programmable Gate Array (FPGA) board. The main software part, implemented in MicroBlaze Microcontroller System (MCS), is coded in C to control the position of stepper motors relative to the DC voltage reference points of the hardware system. A LabVIEW GUI is designed to interface with the control system to provide reference points and display position values via RS-232 and PLC interfaces. This stepper motor control system can be used to effectively implement the phase and amplitude control system of the linac’s RF signals in the future.

Slides THP08 [1.190 MB]

Poster THP08 [3.752 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP08

About •

paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP10

Collimator Motion Control System Upgrade for Medical Linear Accelerator Project at SLRI

controls, software, hardware, interface

183

R. Rujanakraikarn, P. Koonpong, S. Tesprasitte
SLRI, Nakhon Ratchasima, Thailand

A prototype of the 6-MeV medical linear accelerator has been under development at Synchrotron Light Research Institute (SLRI). A set of secondary collimators is utilized with different size arrangement for beam shaping purpose. To produce the desired field size of the beam, the FPGA-based collimator motion control is designed in VHDL for simultaneous control of the collimators while the main PI control is implemented in the FPGA’s main processor. In this paper, hardware and software upgrades of the collimator motion control system are presented. A custom drive hardware for individual collimator is designed to implement with the existing FPGA controller board. Interface between the custom hardware parts and the FPGA’s programmable logic (PL) part is described. Communication between the motion control subsystem and the main LabVIEW control software on PC is modified to send and receive parameters wirelessly. Software modification of the FPGA’s main processor part and that of the LabVIEW GUI part is also reported.

Poster THP10 [3.877 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP10

About •

paper received ※ 09 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP13

The Development of a FPGA Based Front End Safety Interlock System

controls, real-time, EPICS, status

189

J.-Y. Chuang, C.-C. Chang, C.M. Cheng, Y.Z. Lin, I.C. Sheng, Y.C. Yang
NSRRC, Hsinchu, Taiwan

A front end (FE) safety interlock control system was designed to protect humans and the machine integrity during operation. Since stability and reliability are an important requirement in this system, we developed a FPGA based system to control a safety logic for interlock protection. The integration of the FPGA, Real-time and redundant fail-safe system in the FE interlock system enables us to provide a safe protection with EPICS com-munication and hardware protection functions.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP13

About •

paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP15

Design and Implementation of FPGA Based Protection System for Beam Acceleration in Linear IFMIF Prototype Accelerator

controls, EPICS, operation, rfq

195

Y. Hirata, A. Kasugai
QST, Aomori, Japan
A. Jokinen, A. Marqueta
Fusion for Energy, Garching, Germany
H. Takahashi
JAEA/J-PARC, Tokai-Mura, Naka-Gun, Ibaraki-Ken, Japan

IFMIF (International Fusion Materials Irradiation Facility) Prototype Accelerator (LIPAc) has been developed, which is designed to produce a deuteron CW beam with a current of 125 mA at 9 MeV. After the injector commissioning, the LIPAc is entering in the second commissioning phase in which RFQ, MEBT, RF Power System and Beam Instrumentation (BI) systems have been integrated. The LCSs of LIPAc have been developed by European Home Team (EU-HT) and delivered with its subsystems; the CCS, including personnel and machine protection, timing, archiving and alarming, by Japanese Home Team (JA-HT). These have been implemented on the EPICS platform to mitigate the risk of incompatibility in the integration, which JA-HT and EU-HT are jointly carrying out to control the whole accelerator. In the CCS, some interlocks associated with measurement systems–chopper interlock, protection of BI systems, etc.–are implemented on FPGA and the condition of interlock triggering can be changed from EPICS OPIs depending on the beam conditions. The use of EPICS interface can add flexibility but still satisfy fast response and reliability requirement. The design and implementation will be presented.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP15

About •

paper received ※ 10 October 2018 paper accepted ※ 17 October 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP21

Development of Triggered Scaler to Detect Miss-Trigger

operation, EPICS, timing, controls

213

N. Kamikubota
KEK, Ibaraki, Japan
K.C. Sato
J-PARC, KEK & JAEA, Ibaraki-ken, Japan
Y. Tajima
KIS, Ibaraki, Japan
S.Y. Yoshida
Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan

A "triggered scaler" has been developed for J-PARC accelerators. It is a PLC-type scaler with memory-buffers. Number of pulsed signals is counted and stored in a cell of memory-buffer, then, each external trigger (25 Hz) shifts the pointer to the cell. The buffer size (192) is designed to store one machine-cycle (2480 ms or 5200 ms in J-PARC). Demonstrative measurements using a prototype module are reported. In addition, scheme to detect miss-trigger events are discussed.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP21

About •

paper received ※ 21 October 2018 paper accepted ※ 08 November 2018 issue date ※ 21 January 2019

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP22

Guaranteeing the Measurement Accuracy in Em#*

impedance, ISOL, target, synchrotron

216

X. Serra-Gallifa, J.A. Avila-Abellan, M. Broseta, G. Cuní, O. Matilla
ALBA-CELLS Synchrotron, Cerdanyola del Vallès, Spain

ALBA, in collaboration with MAXIV, has developed a four-channel electrometer of 18bit deep with 8 ranges from 1mA to 100pA. The objective of accuracy in the measurements made clear from the beginning the need to compensate the components tolerances and its dependence with temperature. This paper describes the tests performed to characterize the acquisition chain, the automatic calibration developed and the hardware and software implemented to achieve the accuracy target. This implementation has been eased due to the high flexibility given by ALIN and Harmony** architectures used in the Em#.
* J.Avila-Abellan, "Em# Electrometer Comes to Light", ICALEPCS’17.
** M.Broseta, "Present and Future of Harmony Bus, a real-time high speed bus for data transfer between FPGA cores", ICALEPCS’17.

Poster THP22 [1.037 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-THP22

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paper received ※ 10 October 2018 paper accepted ※ 16 October 2018 issue date ※ 21 January 2019

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FRCB1

Ultra Fast Data Acquisition in ELI Beamlines

laser, interface, controls, data-acquisition

230

P. Bastl
Institute of Physics of the ASCR, Prague, Czech Republic
V. Gaman, O. Janda, P. Pivonka, B. Plötzeneder, J. Sys, J. Trdlicka
ELI-BEAMS, Prague, Czech Republic

The ELI Beamlines facility is a Petawatt laser facility in the final construction and commissioning phase in Czech Republic. In fully operation phase, four lasers will be used to control beamlines in six experimental halls. In this paper we describe Ultra fast and distributed data acquisition system as was defined in ELI Beamlines. The data acquisition system is divided into two levels: central and local level. The central level data acquisition system defines a special Tier 0 RAM buffer. This buffer is based on special multi node data acquisition server which shares memory of all its nodes into one continuous space over low latency network technologies (Mellanox Infinband/Intel OmniPath). The main role of the Tier 0 buffer is to acquire first bunch and provide load balancing of incoming data. These data comes from many sources distributed along the experimental technologies. The local data acquisition system is then responsible for connection of local detectors to central data acquisition server through ROCE interface. The connection is done directly when supported or indirectly using local data acquisition computers (for PCIe etc.).

Slides FRCB1 [1.830 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-FRCB1

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paper received ※ 10 October 2018 paper accepted ※ 15 October 2018 issue date ※ 21 January 2019

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FRCC1

FPGA-based Image Processing System for Electron Beam Welding Facility

controls, electron, gun, interface

239

M. M. Sizov, K.A. Blokhina, A.M. Medvedev, A.A. Starostenko
BINP SB RAS, Novosibirsk, Russia
A.M. Medvedev
NSU, Novosibirsk, Russia

In this paper image processing system for secondary emission of electrons in electron beam welding facility is described. System runs on Intel Field Programmable Gate Array (FPGA) for digital processing. Time-sensitive algorithms are designed in VHDL and dataflow DSL Caph. Seam finder algorithm and data filters are written in Caph. The system is designed to filter high-frequency noise and estimate seam location for its automatic correction within 2 us. General algorithms for hardware control and data visualization are described with the interface to the FPGA-based part.

Slides FRCC1 [2.753 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-PCaPAC2018-FRCC1

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paper received ※ 10 October 2018 paper accepted ※ 16 October 2018 issue date ※ 21 January 2019

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reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)