Keyword: EPICS
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WEPAF030 HEPS High-Level Software Architecture Plan database, software, controls, operation 1884
 
  • C.P. Chu, Y.S. Qiao, C.H. Wang
    IHEP, Beijing, People's Republic of China
  • H.H. Lv
    SINAP, Shanghai, People's Republic of China
  
  Funding: Work supported by the Chinese Academy of Science and the HEPS-TF Project.
The High En­ergy Pho­ton Source (HEPS) is a planned ul­tra-low emit­tance syn­chro­tron ra­di­a­tion based light source which re­quires high pre­ces­sion con­trol sys­tems for both ac­cel­er­a­tor and beam­lines. Such kind of ac­cel­er­a­tors will re­quire ex­tremely so­phis­ti­cated high-level con­trol soft­ware for both ac­cel­er­a­tor and beam­line op­er­a­tion to achieve not only the de­manded pre­ci­sion but also high re­li­a­bil­ity. This paper out­lines the high-level ap­pli­ca­tion soft­ware ar­chi­tec­ture de­sign in­clud­ing re­la­tional data-bases, soft­ware plat­forms, and ad­vanced con­trols with ma­chine learn­ing (ML) tech­niques. Early plan for beam-line con­trol is also re­ported. For bet­ter qual­ity con­trol and easy main­te­nance, the high-level ap­pli­ca­tions will be built upon ma­tured soft­ware plat­forms. Also, the HEPS High-Level Soft­ware team will col­lab­o­rate with EPICS com­mu­nity for im­prov­ing the soft­ware plat­forms. 		 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAF030  
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WEPAF054 Online Multi Objective Optimisation at Diamond Light Source injection, sextupole, controls, lattice 1944
 
  • M. Apollonio, R. Bartolini, R.T. Fielder, I.P.S. Martin
    DLS, Oxfordshire, United Kingdom
  • R. Bartolini
    JAI, Oxford, United Kingdom
  • G. Henderson
    Oxford University, Physics Department, Oxford, Oxon, United Kingdom
  • J. Rogers
    Imperial College of Science and Technology, Department of Physics, London, United Kingdom
  
  At Di­a­mond Light Source we have de­vel­oped an Op­ti­miza­tion Pack­age cur­rently used on­line to im­prove the per­for­mance of the ma­chine, usu­ally mea­sured in terms of life­time, in­jec­tion ef­fi­ciency or beam dis­tur­bance at in­jec­tion. The tool is flex­i­ble in that con­trol vari­ables in order to op­ti­mise ob­jec­tives (or their func­tions) can be eas­ily spec­i­fied by means of EPICS process vari­ables (PV), mak­ing it suit­able for vir­tu­ally any sort of op­ti­miza­tion. At pre­sent three dif­fer­ent al­go­rithms can be used to per­form op­ti­miza­tions in a multi-ob­jec­tive fash­ion: Multi-Ob­jec­tive Ge­netic Al­go­rithm (MOGA), Par­ti­cle Swarm Op­ti­mizer (MOPSO) and Sim­u­lated An­neal­ing (MOSA). We pre­sent a se­ries of tests aimed at char­ac­ter­iz­ing the al­go­rithm as well as im­prov­ing the per­for­mance of the ma­chine it­self.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAF054  
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WEPAF090 CS-Studio Operator Training at ReA3 interface, controls, status, power-supply 2061
 
  • T. Summers, D.B. Crisp
    NSCL, East Lansing, Michigan, USA
  • A.C.C. Villari
    FRIB, East Lansing, Michigan, USA
  
  Funding: This material is based upon work supported by the National Science Foundation under Grant No. PHY-1565546
In the past year, Con­trol Sys­tem Stu­dio (CS-Stu­dio) has be­come the pre­dom­i­nant graph­i­cal user in­ter­face tool at ReA3, the 3 MeV/u rare iso­tope beam Reac­cel­er­a­tor at Michi­gan State Uni­ver­sity's Na­tional Su­per­con­duct­ing Cy­clotron Lab­o­ra­tory. CS-Stu­dio is a set of con­trol sys­tem in­ter­face tools that in­clude op­er­a­tor in­ter­faces, his­tory plots, an alarm han­dler, save/re­store, scan­ning, and more. Be­com­ing an ef­fec­tive user of these tools takes con­sid­er­able time and train­ing. This con­tri­bu­tion will de­scribe the chal­lenges and strate­gies for train­ing op­er­a­tors on the gen­eral use of the CS-Stu­dio tools. It will de­scribe the use of a sim­u­lated user in­ter­face en­vi­ron­ment for train­ing op­er­a­tors at any time with­out af­fect­ing the op­er­at­ing fa­cil­ity. 		 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAF090  
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WEPAK014 A New Pulse Magnet Control System in the KEK Electron Positron LINAC controls, power-supply, timing, software 2121
 
  • Y. Enomoto, K. Furukawa, T. Natsui, M. Satoh
    KEK, Ibaraki, Japan
  • H.S. Saotome
    Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan
  
  In 2017, sixty-four pules mag­nets were in­stalled in the KEK e+/e− LINAC for si­mul­ta­ne­ous in­jec­tion to four dif­fer­ent rings. Since each ring re­quires dif­fer­ent in­jec­tion en­ergy, mag­netic field in the LINAC has to be changed shot by shot (every 20 ms) ac­cord­ing to the des­ti­na­tion of the beam. To re­al­ize such op­er­a­tion, a PXI ex­press based new con­trol sys­tem was in­stalled. Each unit, which con­sists of an event re­ceiver board, a DAC board, and a ADC board, can set and mon­i­tor out­put cur­rent up to 8 pulsed power sup­ply in 16 bit res­o­lu­tion. The tim­ing and con­trol sys­tem are in­te­grated in that of the LINAC by using Mi­cro-Re­search Fin­land's PXI event re­ceiver board. In terms of soft­ware, Win­dows 8.1 and Lab­VIEW 2016 were mainly adopted to con­trol the hard­ware. EPICS chan­nel ac­cess (CA) pro­to­col was used to com­mu­ni­cate with op­er­a­tor's in­ter­face pan­els. In ad­di­tion to real-time mon­i­tor­ing by EPICS CA and log­ging by CSS archiver every 10 s, data are logged every shot (every 20 ms) in the text file to­gether with time­stamp, shot ID and des­ti­na­tion. At pre­sent, thir­teen units are sta­bly in op­er­a­tion to con­trol 64 mag­nets. Fur­ther in­stal­la­tion of the sys­tem is planned in 2018.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAK014  
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WEPAK016 RF Monitor System for SuperKEKB Injector Linac linac, FPGA, controls, data-acquisition 2128
 
  • H. Katagiri, M. Akemoto, D.A. Arakawa, T. Matsumoto, T. Miura, F. Qiu, Y. Yano
    KEK, Ibaraki, Japan
  
  A new radio fre­quency (RF) mon­i­tor sys­tem for the Su­perKEKB pro­ject has been de­vel­oped at the KEK in-jec­tor linac. The RF mon­i­tor unit, which con­sists of an ana­log I/Q de­mod­u­la­tor, ADC/DAC board, and FPGA board achieved 50-Hz data ac­qui­si­tion and beam mode iden­ti­fi­ca­tion. On the RF mon­i­tor, the am­pli­tude and phase mea­sure­ment pre­ci­sion has achieved 0.1% rms and 0.1° rms, re­spec­tively. Sixty RF mon­i­tor units have been in­stalled in the linac. The pre­sent sta­tus of the RF mon­i­tor sys­tem will be re-ported.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-WEPAK016  
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THYGBE3 RF Controls for High-Q Cavities for the LCLS-II LLRF, controls, cavity, cryomodule 2929
 
  • C. Serrano, K.S. Campbell, L.R. Doolittle, G. Huang, A. Ratti
    LBNL, Berkeley, California, USA
  • R. Bachimanchi, C. Hovater
    JLab, Newport News, Virginia, USA
  • A.L. Benwell, M. Boyes, G.W. Brown, D. Cha, G. Dalit, J.A. Diaz Cruz, J. Jones, R.S. Kelly, A. McCollough
    SLAC, Menlo Park, California, USA
  • B.E. Chase, E. Cullerton, J. Einstein-Curtis, J.P. Holzbauer, D.W. Klepec, Y.M. Pischalnikov, W. Schappert
    Fermilab, Batavia, Illinois, USA
  • L.R. Dalesio, M.A. Davidsaver
    Osprey DCS LLC, Ocean City, USA
  
  Funding: This work was supported by the LCLS-II Project and the U.S. Department of Energy, Contract n. DE-AC02-76SF00515.
The SLAC Na­tional Ac­cel­er­a­tor Lab­o­ra­tory is build­ing LCLS-II, a new 4 GeV CW su­per­con­duct­ing (SCRF) Linac as a major up­grade of the ex­ist­ing LCLS. The LCLS-II Low-Level Radio Fre­quency (LLRF) col­lab­o­ra­tion is a multi-lab ef­fort within the De­part­ment of En­ergy (DOE) ac­cel­er­a­tor com­plex. The ne­ces­sity of high lon­gi­tu­di­nal beam sta­bil­ity of LCLS-II im­poses tight am­pli­tude and phase sta­bil­ity re­quire­ments on the LLRF sys­tem (up to 0.01% in am­pli­tude and 0.01° in phase RMS). This is the first time such re­quire­ments are ex­pected of su­per­con­duct­ing cav­i­ties op­er­at­ing in con­tin­u­ous-wave (CW) mode. Ini­tial mea­sure­ments on the Cry­omod­ule test stands at part­ner labs have shown that the early pro­duc­tion units are able to meet the ex­trap­o­lated hard­ware re­quire­ments to achieve such lev­els of per­for­mance. A large ef­fort is cur­rently un­der­way for sys­tem in­te­gra­tion, Ex­per­i­men­tal Physics and In­dus­trial Con­trol Sys­tem (EPICS) con­trols, trans­fer of knowl­edge from the part­ner labs to SLAC and the pro­duc­tion and test­ing of 76 racks of LLRF equip­ment. 		 
slides icon Slides THYGBE3 [14.383 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THYGBE3  
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THPAK049 Simulation Code Design for the Interpreted Language Using the Compiled Module simulation, interface, linac, lattice 3327
 
  • K. Fukushima, M.A. Davidsaver, Z.Q. He, M. Ikegami, G. Shen, T. Yoshimoto, T. Zhang
    FRIB, East Lansing, USA
  • J. Qiang
    LBNL, Berkeley, California, USA
  
  Funding: Work supported by the U.S. Department of Energy Office of Science under Cooperative Agreement DESC0000661.
We are plan­ning to use two types of the ac­cel­er­a­tor sim­u­la­tion codes for FRIB (Fa­cil­ity for Rare Iso­tope Beams). One is the lin­ear en­ve­lope track­ing code "FLAME" for fast sim­u­la­tions. FLAME can cal­cu­late the FRIB-linac beam en­ve­lope within an order of ms. This is use­ful in sys­tem­atic sur­veys, wide range op­ti­miza­tions and so forth. This code, writ­ten in C++, was de­signed with Python in­ter­face from the be­gin­ning. On the other hand, "Ad­vanced-IM­PACT" is the par­ti­cle track­ing code ded­i­cated for pre­cise and re­al­is­tic cal­cu­la­tions, which can sim­u­late the par­ti­cle losses, non­lin­ear and space-charge ef­fects. This code is refac­tored from the For­tran code IM­PACT-Z de­vel­oped in LBNL. Both codes pro­vide the com­piled mod­ules for Python to sup­port flex­i­ble in­puts and di­rect out­puts man­age­ment in mem­ory. In other words, they can be di­rectly con­nected to the mod­ern sci­en­tific tools through the Python in­ter­face with­out delay in the data trans­port. In ad­di­tion, these mod­ules can ac­com­plish the in­ter­ac­tive sim­u­la­tion processes with­out los­ing com­pu­ta­tional ef­fi­ciency. We re­port the knowl­edges ap­plic­a­ble for other ac­cel­er­a­tor sim­u­la­tion codes among those ob­tained through these de­vel­op­ments and de­signs. 		 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPAK049  
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THPMF045 Synchronized Beam Position Measurement for SuperKEKB Injector Linac linac, controls, electron, operation 4159
 
  • M. Satoh, F. Miyahara, T. Suwada
    KEK, Ibaraki, Japan
  • T. Kudou, S. Kusano
    Mitsubishi Electric System & Service Co., Ltd, Tsukuba, Japan
  • T. Ohfusa, H.S. Saotome, M. Takagi
    Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan
  
  To­ward Su­perKEKB pro­ject, the in­jec­tor linac up­grade is on­go­ing for aim­ing at the sta­ble beam op­er­a­tion with low emit­tance and high in­ten­sity bunch charge. One of the key chal­lenges is a low emit­tance preser­va­tion of elec­tron beam be­cause the ver­ti­cal emit­tance of 20 mm.​mrad or less should be trans­ported to the main ring with­out a damp­ing ring. For this pur­pose, the fine align­ment of ac­cel­er­a­tor com­po­nents is a cru­cial issue since the linac align­ment was badly dam­aged by the big earth­quake in 2011. From the sim­u­la­tion re­sults of emit­tance growth, the align­ment of the quadru­pole mag­nets and ac­cel­er­at­ing struc­tures should be con­ducted at the level of 300 um in rms along the 600-m-long linac. In ad­di­tion, we are aim­ing at the level of 100 um align­ment in rms within the short range dis­tance of 100 m long. Even after the fine com­po­nent align­ment can be achieved, the fine beam orbit ma­nip­u­la­tion is nec­es­sary for low emit­tance preser­va­tion. For these rea­sons, we have de­vel­oped the new BPM read­out sys­tem based on VME64x. The new sys­tem has im­proved the pre­ci­sion of beam po­si­tion mea­sure­ment up to 3 um from 25 um. We will de­scribe the soft­ware de­vel­op­ment of the new BPM read­out sys­tem.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPMF045  
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THPML060 Virtual VELA-CLARA: The Development of a Virtual Accelerator simulation, controls, lattice, software 4773
 
  • T.J. Price, H.M. Castaneda Cortes, D.J. Dunning, J.K. Jones, B.D. Muratori, D.J. Scott, B.J.A. Shepherd, P.H. Williams
    STFC/DL/ASTeC, Daresbury, Warrington, Cheshire, United Kingdom
  • R.F. Clarke, G. Cox
    STFC/DL, Daresbury, Warrington, Cheshire, United Kingdom
  
  A Vir­tual Ac­cel­er­a­tor (VA) has been de­vel­oped to mimic the ac­cel­er­a­tors Ver­sa­tile Elec­tron Lin­ear Ac­cel­er­a­tor (VELA) and Com­pact Lin­ear Ac­cel­er­a­tor for Re­search and Ap­pli­ca­tions (CLARA). Its pur­pose is to test con­trol room ap­pli­ca­tions, run start-to-end sim­u­la­tions with mul­ti­ple sim­u­la­tion codes, ac­cu­rately re­pro­duce mea­sured beam prop­er­ties, con­duct 'vir­tual ex­per­i­ments'and gain in­sight into ‘hid­den beam pa­ra­me­ters'. This paper gives an overview into the cur­rent progress in con­struct­ing this VA, de­tail­ing the areas of: de­vel­op­ing a 'Vir­tual EPICS' con­trol sys­tem, using mul­ti­ple sim­u­la­tion codes (both par­ti­cle track­ing and an­a­lytic), the de­vel­op­ment of a ‘Mas­ter Lat­tice' and the con­struc­tion of a Python in­ter­face in which to run the VA.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML060  
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THPML071 Upgrade of Digital BPM Processor at DCLS and SXFEL FEL, cavity, software, FPGA 4807
 
  • L.W. Lai, F.Z. Chen, Y.B. Leng, T. Wu, Y.B. Yan
    SSRF, Shanghai, People's Republic of China
  • J. Chen
    SINAP, Shanghai, People's Republic of China
  
  A dig­i­tal BPM proces­sor has been de­vel­oped at 2016 in SINAP for DCLS and SXFEL, which are FEL fa­cil­i­ties built in China. The stripline BPM and cav­ity BPM proces­sors share the same hard­ware plat­form and firmware, but the pro­cess­ing al­go­rithms im­ple­mented in EPICS IOC on the ARM CPU are dif­fer­ent. The ca­pa­bil­ity of the ARM lim­its the pro­cess­ing speed to 10 bunches per sec­ond. Now the bunch rate of DCLS and SXFEL are going to in­crease from 10Hz to 50Hz. To meet the higher pro­cess­ing speed re­quire­ments, the proces­sor firmware and soft­ware are up­graded in 2017. All BPM sig­nal pro­cess­ing al­go­rithms are im­ple­mented in FPGA, and EPICS IOC reads re­sults only. After the up­grade, the pro­cess­ing speed reach 120 bunches per sec­ond. And this is also a good prepa­ra­tion for fu­ture Shang­hai Hard-X ray FEL, which bunch rate is about 1MHz.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML071  
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THPML108 Distributed I/O System Based on Ethernet POWERLINK Under the EPICS Architecture Ethernet, distributed, FPGA, network 4917
 
  • X.K. Sun, G. Liu, Y. Song
    USTC/NSRL, Hefei, Anhui, People's Republic of China
  
  Eth­er­net POW­ER­LINK (EPL) is a com­mu­ni­ca­tion pro­file for Real-Time Eth­er­net. The com­mu­ni­ca­tion pro­file meets real-time de­mands for the dis­trib­uted sys­tem com­posed of mul­ti­ple con­trollers. EPICS is a wildly used dis­trib­uted con­trol sys­tem in large sci­en­tific fa­cil­i­ties. We de­sign a dis­trib­uted IO sys­tem based on EPL under the EPICS ar­chi­tec­ture and es­tab­lish the pro­to­type sys­tem com­posed of a PC and six FPGA boards. In this sys­tem, an EPICS dri­ver based on open­POW­ER­LINK is de­vel­oped to mon­i­tor the sys­tem sta­tus. In this paper, the com­mu­ni­ca­tion mech­a­nism of EPL, the de­sign of sys­tem ar­chi­tec­ture, the im­ple­men­ta­tion of EPICS dri­ver and the test re­sults of pro­to­type sys­tem will be de­scribed.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML108  
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THPML109 Control System Design for Front End Devices of IRFEL controls, FEL, power-supply, interface 4920
 
  • S. Xu, G. Liu, Y. Song, X.K. Sun
    USTC/NSRL, Hefei, Anhui, People's Republic of China
  
  An In­frared Free Elec­tron Laser Light (IRFEL) is being con­structed at Na­tional Syn­chro­tron Ra­di­a­tion Lab­o­ra­tory. IRFEL con­sists of e-gun, ac­cel­er­at­ing tube, mi­crowave, kly­stron, power sup­ply, vac­uum, res­onator, un­du­la­tor, beam di­ag­no­sis, cool­ing water and other de­vices. The de­vel­op­ment of the con­trol sys­tem for the front end de­vices of IRFEL is based on EPICS. This paper will in­tro­duce the hard­ware sys­tem de­sign, Input Out­put Con­troller ap­pli­ca­tion, Op­er­a­tion In­ter­face, data archiv­ing and re­trieval.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML109  
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THPML110 EPICS Driver for Siemens CP1616 Communication Module real-time, controls, network, hardware 4923
 
  • Z. Huang, G. Liu, Y. Song, X.K. Sun
    USTC/NSRL, Hefei, Anhui, People's Republic of China
  
  Funding: Work supported by National Natural Science Foundation of China (11375186)
Siemens com­mu­ni­ca­tion mod­ule CP1616 is a high-per­for­mance PROFINET con­troller, which can sup­port both Real-time (RT) and Isochro­nous Real-Time (IRT) com­mu­ni­ca­tion. Ex­per­i­men­tal Physics and In­dus­trial Con­trol Sys­tem (EPICS) is a wildly used dis­trib­uted con­trol sys­tem in large sci­en­tific de­vices. In order to in­te­grate PROFINET pro­to­col into EPICS en­vi­ron­ment, we de­vel­oped this dri­ver based on CP1616 and es­tab­lished the pro­to­type sys­tem. This paper will de­scribe the de­sign of EPICS dri­ver for CP1616 and the test re­sult of the pro­to­type sys­tem. 		 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2018-THPML110  
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