The Joint Accelerator Conferences Website (JACoW) is an international collaboration that publishes the proceedings of accelerator conferences held around the world.
TY - CONF AU - Lai, L.W. AU - Chen, F.Z. AU - Chen, J. AU - Leng, Y.B. AU - Wu, T. AU - Yan, Y.B. ED - Koscielniak, Shane ED - Satogata, Todd ED - Schaa, Volker RW ED - Thomson, Jana TI - Upgrade of Digital BPM Processor at DCLS and SXFEL J2 - Proc. of IPAC2018, Vancouver, BC, Canada, April 29-May 4, 2018 C1 - Vancouver, BC, Canada T2 - International Particle Accelerator Conference T3 - 9 LA - english AB - A digital BPM processor has been developed at 2016 in SINAP for DCLS and SXFEL, which are FEL facilities built in China. The stripline BPM and cavity BPM processors share the same hardware platform and firmware, but the processing algorithms implemented in EPICS IOC on the ARM CPU are different. The capability of the ARM limits the processing speed to 10 bunches per second. Now the bunch rate of DCLS and SXFEL are going to increase from 10Hz to 50Hz. To meet the higher processing speed requirements, the processor firmware and software are upgraded in 2017. All BPM signal processing algorithms are implemented in FPGA, and EPICS IOC reads results only. After the upgrade, the processing speed reach 120 bunches per second. And this is also a good preparation for future Shanghai Hard-X ray FEL, which bunch rate is about 1MHz. PB - JACoW Publishing CP - Geneva, Switzerland SP - 4807 EP - 4810 KW - FEL KW - cavity KW - software KW - EPICS KW - FPGA DA - 2018/06 PY - 2018 SN - 978-3-95450-184-7 DO - 10.18429/JACoW-IPAC2018-THPML071 UR - http://jacow.org/ipac2018/papers/thpml071.pdf ER -