ICALEPCS2019 - List of Keywords (power-supply)

Paper	Title	Other Keywords	Page
MOPHA073	Recent Updates of the RIKEN RI Beam Factory Control System	controls, EPICS, experiment, cyclotron	384
	M. Komiyama, M. Fujimaki, N. Fukunishi, A. Uchiyama RIKEN Nishina Center, Wako, Japan
	We report on two latest updates of the RIKEN Radioactive Isotope Beam Factory (RIBF) control system. First, the successor of the existing beam interlock system (BIS) operated since 2006 was developed in 2019. As a first step, it covers a small part of the RIBF facility. The new interlock system is based on a programmable logic controller (PLC) and uses a Linux-based PLC-CPU on that the Experimental Physics and Industrial Control System (EPICS) programs can be executed in addition to a sequencer. By using two kinds of CPUs properly according to the speed required for each signal handled in the system, we succeeded in reducing the response time less than one third of the BIS in the performance test using prototype. Second, we plan to expand coverage of the alarm system. We have applied the Best Ever Alarm System Toolkit (BEAST) for several years in addition to the Alarm Handler mainly to vacuum components. We have tried to include the magnet power supplies but found difficulties in treating old power supplies having large fluctuations of read-out values of their excitation currents in an appropriate manner. Our trials to overcome this problem will be presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA073
About •	paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA163	The Detector Control System of the Muon Forward Tracker for the ALICE Experiment at LHC	detector, controls, experiment, framework	617
	K. Yamakawa Hiroshima University, Faculty of Science, Higashi-Hirosima, Japan
	ALICE is the LHC experiment specifically devoted to the study of heavy-ion collisions. The Muon Forward Tracker (MFT) is one of the new detectors developed in the framework of the upgrade programs towards the LHC Run 3 starting from 2021. A Detector Control System (DCS) was developed for the MFT within the new framework of the upgraded ALICE central DCS. In this framework, detectors will deliver physics raw data as well as slow control data. The central DCS will be composed of an interface, named Alice Low level FRont-End Device (ALFRED), to convert high-level words within the DCS to low-level words which are sent to the detector FEE as commands. Used Supervisory Control And Data Acquisition (SCADA) is WinCC Open Architecture (OA). In addition, Joint Control Project Framework is installed to provide standard DCS solutions such as a Finite State Machine (FSM) commonly used by the LHC experiments. The FSM, as a base of the DCS hierarchy, was fully developed and successfully tested. A test bench of the MFT DCS was built as a minimal setup of the full DCS chain consisting of WinCC OA, ALFRED, a demonstration board of a DCS chip and a readout board. The latest status will be presented.
	Poster MOPHA163 [1.106 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA163
About •	paper received ※ 30 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP03	Low-Cost Modular Platform for Custom Electronics in Radiation-Exposed and Radiation-Free Areas at CERN	radiation, controls, FPGA, Ethernet	671
	G. Daniluk, C. Gentsos, E. Gousiou, L. Patnaik, M. Rizzi CERN, Geneva, Switzerland
	The CERN control system is comprised of multiple layers of hardware and software. These tiers extend from the hardware deployed close to the machine, up to the software running on computers that operators use for control and monitoring. We are currently developing a new centrally supported service in the layers closest to the accelerator - Distributed I/O and Fieldbus. A key aspect of this project is the selection of industrial standards for the layers, which are currently dominated by custom, in-house designed solutions. Regarding the Distributed I/O layer, this paper describes how we are adapting CompactPCI Serial (CPCI-S) to be suitable as the low-cost modular hardware platform for remote analog and digital I/O applications in radiation-exposed as well as radiation-free areas. We are designing a low cost 3U chassis with a CPCI-S backplane accompanied by a radiation tolerant, switched-mode power supply and an FPGA-based System Board. Regarding the Fieldbus layer, the paper focuses on the radiation-tolerant implementation of the Industrial Ethernet protocol, Powerlink.
	Slides TUAPP03 [7.663 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP03
About •	paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUBPR02	A 4-Channel, 7 ns-Delay Tuning Range, 400 fs-Step, 1.8 ps RMS Jitter, Delay Generator Implemented in a 180 nm CMOS Technology	experiment, timing, controls, target	733
	F.C. Badets, G.A. Billiot, S. Bouquet, B. Caillat, A. Fustier, F. Lepin, C. Magnier, G. Regis, A. Spataro CEA, Grenoble, France D. Monnier-Bourdin, B. Riondet Greenfield Technology, Massy, France
	This paper discloses the integration, in a 180 nm CMOS technology, of a 4-channel delay generator dedicated to synchronization down to a few ps. The delay generation principle relies on the linear charge of a capacitor triggered by the input pulse. The output pulse generation occurs when the capacitor voltage exceeds a threshold voltage. The delay full scale is automatically set to match the period of the master clock, ranging from 5-7 ns, with the help of an embedded calibration circuit. The delay value is controlled with the help of a 14-bit DAC setting the threshold voltage, which leads to a 400 fs delay step. Among other features, the chip embeds a combination mode of either 2 or 4 channels to output narrow width pulses. The chip is fully compliant with LVDS, LVPECL and CML differential input pulses and outputs LVPECL pulses. The chip has been fully characterized over temperature (0 to 60 °C) and supply voltage (± 10%). The chip is compliant with pulse repetition frequencies up to 20 MHz. The measured INL is 100 LSB and the RMS jitter is 1.8 ps. The power consumption has been measured to 350 mW for 4 active channels.
	Slides TUBPR02 [5.312 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUBPR02
About •	paper received ※ 30 September 2019 paper accepted ※ 09 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WECPR05	Pulsed Magnet Control System Using COTS PXIe Devices and LabVIEW	controls, linac, software, operation	946
	Y. Enomoto, K. Furukawa, T. Natsui, M. Satoh KEK, Ibaraki, Japan H.S. Saotome Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan
	About one hundred channels of pulsed magnet power supply control system were installed in 2017 in KEK electron positron LINAC to realize pulse-to-pulse control of output current every 20 ms. The control system of a group of eight channels totally consists of commercially available devices, namely a PC (Windows 8.1), a PXIe crate and several PXIe boards such as ADC, DAC communication and timing. The software is written with LabVIEW. EPICS channel access protocol is used to communicate with OPI over standard Ethernet network. Depending on the destination of the beam, there are ten beam modes. The software is able to keep parameters for each mode independently, which makes it possible for us to operate one LINAC as if it were ten virtual LINACs. Even Software feedback to compensate small drift of output current is available for each mode independently. During two years of operation, there were no significant problem. Although the Windows is not a real-time OS, dropping rate of the trigger coming every 20 ms is less than a ppm. Rebooting of the PC or software is necessary only a few times in a year.
	Slides WECPR05 [5.799 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WECPR05
About •	paper received ※ 29 September 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA028	Power Supply Controller for Future Accelerator Facilities at BINP	controls, electron, operation, Ethernet	1145
	P.B. Cheblakov, A.V. Gerasev, S.E. Karnaev, D.V. Senkov BINP SB RAS, Novosibirsk, Russia
	A design of a new power supply controller was initiated in BINP for upgrade of existing accelerator facilities and for demands of future projects. Any accelerator facility includes a set of diverse power supplies which controllers have different specifications: number and precision of DAC/ADC channels, speed and algorithm of operation. Therefore, the main idea is to elaborate a controller, which consists of common digital part including an interface with a control system and specialized analog frontend that fits to power supplies requirements. The digital part provides easy integration to control system by means of some standard network protocol and performing some data processing and analysis. Ethernet is used for communication with controllers, MQTT is under consideration as a high-level transport protocol in some cases and EPICS IOC was tested to be embedded into controller. The initial prototype of controller is developed and deployed at VEPP-3 storage ring. The status of the work and future plans are presented in the paper.
	Poster WEPHA028 [9.746 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA028
About •	paper received ※ 04 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA081	Analysis and Diagnostic Toolkit for Operation Event in the NSRRC	operation, controls, injection, toolkit	1280
	C.H. Kuo, B.Y. Chen, H.H. Chen, H.C. Chen, T.W. Hsu, B.Y. Huang, S.J. Huang, T.Y. Lee, J.A. Li, W.Y. Lin, Y.K. Lin NSRRC, Hsinchu, Taiwan
	Taiwan Photon Source (TPS) and Taiwan light source (TLS) have been operated in the same time. TPS is a 3 GeV electron energy, 518 m circumference, low-emittance synchrotron storage ring which will offer one of the synchrotron x-ray sources, provide cutting-edge experimental facilities and novel multidisciplinary scientific research. TLS is a 1.5 Gev electron energy. The control system is difference between two facilities. Amount of instruments and devices these must be monitored and controlled by operator. The difference diagnostic tools will be difficult to operate and analysis between two system. These utility toolkits are effective to reduce operator loading. However, these tools are developed with same concept, combined with two difference machine is effective and reduce maintenance efforts. These applications of software will be reported in this conference.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA081
About •	paper received ※ 02 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

MOPHA073

Recent Updates of the RIKEN RI Beam Factory Control System

controls, EPICS, experiment, cyclotron

384

M. Komiyama, M. Fujimaki, N. Fukunishi, A. Uchiyama
RIKEN Nishina Center, Wako, Japan

We report on two latest updates of the RIKEN Radioactive Isotope Beam Factory (RIBF) control system. First, the successor of the existing beam interlock system (BIS) operated since 2006 was developed in 2019. As a first step, it covers a small part of the RIBF facility. The new interlock system is based on a programmable logic controller (PLC) and uses a Linux-based PLC-CPU on that the Experimental Physics and Industrial Control System (EPICS) programs can be executed in addition to a sequencer. By using two kinds of CPUs properly according to the speed required for each signal handled in the system, we succeeded in reducing the response time less than one third of the BIS in the performance test using prototype. Second, we plan to expand coverage of the alarm system. We have applied the Best Ever Alarm System Toolkit (BEAST) for several years in addition to the Alarm Handler mainly to vacuum components. We have tried to include the magnet power supplies but found difficulties in treating old power supplies having large fluctuations of read-out values of their excitation currents in an appropriate manner. Our trials to overcome this problem will be presented.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA073

About •

paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA163

The Detector Control System of the Muon Forward Tracker for the ALICE Experiment at LHC

detector, controls, experiment, framework

617

K. Yamakawa
Hiroshima University, Faculty of Science, Higashi-Hirosima, Japan

ALICE is the LHC experiment specifically devoted to the study of heavy-ion collisions. The Muon Forward Tracker (MFT) is one of the new detectors developed in the framework of the upgrade programs towards the LHC Run 3 starting from 2021. A Detector Control System (DCS) was developed for the MFT within the new framework of the upgraded ALICE central DCS. In this framework, detectors will deliver physics raw data as well as slow control data. The central DCS will be composed of an interface, named Alice Low level FRont-End Device (ALFRED), to convert high-level words within the DCS to low-level words which are sent to the detector FEE as commands. Used Supervisory Control And Data Acquisition (SCADA) is WinCC Open Architecture (OA). In addition, Joint Control Project Framework is installed to provide standard DCS solutions such as a Finite State Machine (FSM) commonly used by the LHC experiments. The FSM, as a base of the DCS hierarchy, was fully developed and successfully tested. A test bench of the MFT DCS was built as a minimal setup of the full DCS chain consisting of WinCC OA, ALFRED, a demonstration board of a DCS chip and a readout board. The latest status will be presented.

Poster MOPHA163 [1.106 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA163

About •

paper received ※ 30 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP03

Low-Cost Modular Platform for Custom Electronics in Radiation-Exposed and Radiation-Free Areas at CERN

radiation, controls, FPGA, Ethernet

671

G. Daniluk, C. Gentsos, E. Gousiou, L. Patnaik, M. Rizzi
CERN, Geneva, Switzerland

The CERN control system is comprised of multiple layers of hardware and software. These tiers extend from the hardware deployed close to the machine, up to the software running on computers that operators use for control and monitoring. We are currently developing a new centrally supported service in the layers closest to the accelerator - Distributed I/O and Fieldbus. A key aspect of this project is the selection of industrial standards for the layers, which are currently dominated by custom, in-house designed solutions. Regarding the Distributed I/O layer, this paper describes how we are adapting CompactPCI Serial (CPCI-S) to be suitable as the low-cost modular hardware platform for remote analog and digital I/O applications in radiation-exposed as well as radiation-free areas. We are designing a low cost 3U chassis with a CPCI-S backplane accompanied by a radiation tolerant, switched-mode power supply and an FPGA-based System Board. Regarding the Fieldbus layer, the paper focuses on the radiation-tolerant implementation of the Industrial Ethernet protocol, Powerlink.

Slides TUAPP03 [7.663 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP03

About •

paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUBPR02

A 4-Channel, 7 ns-Delay Tuning Range, 400 fs-Step, 1.8 ps RMS Jitter, Delay Generator Implemented in a 180 nm CMOS Technology

experiment, timing, controls, target

733

F.C. Badets, G.A. Billiot, S. Bouquet, B. Caillat, A. Fustier, F. Lepin, C. Magnier, G. Regis, A. Spataro
CEA, Grenoble, France
D. Monnier-Bourdin, B. Riondet
Greenfield Technology, Massy, France

This paper discloses the integration, in a 180 nm CMOS technology, of a 4-channel delay generator dedicated to synchronization down to a few ps. The delay generation principle relies on the linear charge of a capacitor triggered by the input pulse. The output pulse generation occurs when the capacitor voltage exceeds a threshold voltage. The delay full scale is automatically set to match the period of the master clock, ranging from 5-7 ns, with the help of an embedded calibration circuit. The delay value is controlled with the help of a 14-bit DAC setting the threshold voltage, which leads to a 400 fs delay step. Among other features, the chip embeds a combination mode of either 2 or 4 channels to output narrow width pulses. The chip is fully compliant with LVDS, LVPECL and CML differential input pulses and outputs LVPECL pulses. The chip has been fully characterized over temperature (0 to 60 °C) and supply voltage (± 10%). The chip is compliant with pulse repetition frequencies up to 20 MHz. The measured INL is 100 LSB and the RMS jitter is 1.8 ps. The power consumption has been measured to 350 mW for 4 active channels.

Slides TUBPR02 [5.312 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUBPR02

About •

paper received ※ 30 September 2019 paper accepted ※ 09 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WECPR05

Pulsed Magnet Control System Using COTS PXIe Devices and LabVIEW

controls, linac, software, operation

946

Y. Enomoto, K. Furukawa, T. Natsui, M. Satoh
KEK, Ibaraki, Japan
H.S. Saotome
Kanto Information Service (KIS), Accelerator Group, Ibaraki, Japan

About one hundred channels of pulsed magnet power supply control system were installed in 2017 in KEK electron positron LINAC to realize pulse-to-pulse control of output current every 20 ms. The control system of a group of eight channels totally consists of commercially available devices, namely a PC (Windows 8.1), a PXIe crate and several PXIe boards such as ADC, DAC communication and timing. The software is written with LabVIEW. EPICS channel access protocol is used to communicate with OPI over standard Ethernet network. Depending on the destination of the beam, there are ten beam modes. The software is able to keep parameters for each mode independently, which makes it possible for us to operate one LINAC as if it were ten virtual LINACs. Even Software feedback to compensate small drift of output current is available for each mode independently. During two years of operation, there were no significant problem. Although the Windows is not a real-time OS, dropping rate of the trigger coming every 20 ms is less than a ppm. Rebooting of the PC or software is necessary only a few times in a year.

Slides WECPR05 [5.799 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WECPR05

About •

paper received ※ 29 September 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA028

Power Supply Controller for Future Accelerator Facilities at BINP

controls, electron, operation, Ethernet

1145

P.B. Cheblakov, A.V. Gerasev, S.E. Karnaev, D.V. Senkov
BINP SB RAS, Novosibirsk, Russia

A design of a new power supply controller was initiated in BINP for upgrade of existing accelerator facilities and for demands of future projects. Any accelerator facility includes a set of diverse power supplies which controllers have different specifications: number and precision of DAC/ADC channels, speed and algorithm of operation. Therefore, the main idea is to elaborate a controller, which consists of common digital part including an interface with a control system and specialized analog frontend that fits to power supplies requirements. The digital part provides easy integration to control system by means of some standard network protocol and performing some data processing and analysis. Ethernet is used for communication with controllers, MQTT is under consideration as a high-level transport protocol in some cases and EPICS IOC was tested to be embedded into controller. The initial prototype of controller is developed and deployed at VEPP-3 storage ring. The status of the work and future plans are presented in the paper.

Poster WEPHA028 [9.746 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA028

About •

paper received ※ 04 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA081

Analysis and Diagnostic Toolkit for Operation Event in the NSRRC

operation, controls, injection, toolkit

1280

C.H. Kuo, B.Y. Chen, H.H. Chen, H.C. Chen, T.W. Hsu, B.Y. Huang, S.J. Huang, T.Y. Lee, J.A. Li, W.Y. Lin, Y.K. Lin
NSRRC, Hsinchu, Taiwan

Taiwan Photon Source (TPS) and Taiwan light source (TLS) have been operated in the same time. TPS is a 3 GeV electron energy, 518 m circumference, low-emittance synchrotron storage ring which will offer one of the synchrotron x-ray sources, provide cutting-edge experimental facilities and novel multidisciplinary scientific research. TLS is a 1.5 Gev electron energy. The control system is difference between two facilities. Amount of instruments and devices these must be monitored and controlled by operator. The difference diagnostic tools will be difficult to operate and analysis between two system. These utility toolkits are effective to reduce operator loading. However, these tools are developed with same concept, combined with two difference machine is effective and reduce maintenance efforts. These applications of software will be reported in this conference.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA081

About •

paper received ※ 02 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)