ICALEPCS2019 - List of Keywords (cyclotron)

Paper	Title	Other Keywords	Page
MOPHA073	Recent Updates of the RIKEN RI Beam Factory Control System	controls, EPICS, power-supply, experiment	384
	M. Komiyama, M. Fujimaki, N. Fukunishi, A. Uchiyama RIKEN Nishina Center, Wako, Japan
	We report on two latest updates of the RIKEN Radioactive Isotope Beam Factory (RIBF) control system. First, the successor of the existing beam interlock system (BIS) operated since 2006 was developed in 2019. As a first step, it covers a small part of the RIBF facility. The new interlock system is based on a programmable logic controller (PLC) and uses a Linux-based PLC-CPU on that the Experimental Physics and Industrial Control System (EPICS) programs can be executed in addition to a sequencer. By using two kinds of CPUs properly according to the speed required for each signal handled in the system, we succeeded in reducing the response time less than one third of the BIS in the performance test using prototype. Second, we plan to expand coverage of the alarm system. We have applied the Best Ever Alarm System Toolkit (BEAST) for several years in addition to the Alarm Handler mainly to vacuum components. We have tried to include the magnet power supplies but found difficulties in treating old power supplies having large fluctuations of read-out values of their excitation currents in an appropriate manner. Our trials to overcome this problem will be presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA073
About •	paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA165	An Embedded IOC for 100 MeV Cyclotron RF Control	EPICS, controls, embedded, hardware	625
	Z.G. Yin, X.L. Fu, X.T. Lu, T.J. Zhang CIAE, Beijing, People’s Republic of China X.E. Mu North China University of Technology, Beijing, People’s Republic of China
	An ARM9 based embedded controller for 100 MeV cyclotron RF control has been successfully developed and tested with EPICS control software. The controller is implemented as a 3U VME long card, located in the first slot of the LLRF control crate, as a supervise module that continuously monitors the status of the RF system through a costume designed backplane and related ADCs located on other boards in the crate. For high components density and signal integrate considerations, the PCB layout adopts a 6-layer design. The Debian GNU/Linux distribution for the ARM architecture has been selected as operating system for both robustness and convenience. EPICS device support as well as Linux driver routings has been written and tested to interface database records to the on board 12 multichannel 16-bit ADCs and DACs. In the meantime, a chip selecting encoding-decoding strategy has been implemented from both software and hardware aspects to extend the SPI bus of the AT91SAM9g20 processor. The detailed software as well as hardware designed will be reported in this paper.
	Poster MOPHA165 [0.344 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA165
About •	paper received ※ 18 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

MOPHA073

Recent Updates of the RIKEN RI Beam Factory Control System

controls, EPICS, power-supply, experiment

384

M. Komiyama, M. Fujimaki, N. Fukunishi, A. Uchiyama
RIKEN Nishina Center, Wako, Japan

We report on two latest updates of the RIKEN Radioactive Isotope Beam Factory (RIBF) control system. First, the successor of the existing beam interlock system (BIS) operated since 2006 was developed in 2019. As a first step, it covers a small part of the RIBF facility. The new interlock system is based on a programmable logic controller (PLC) and uses a Linux-based PLC-CPU on that the Experimental Physics and Industrial Control System (EPICS) programs can be executed in addition to a sequencer. By using two kinds of CPUs properly according to the speed required for each signal handled in the system, we succeeded in reducing the response time less than one third of the BIS in the performance test using prototype. Second, we plan to expand coverage of the alarm system. We have applied the Best Ever Alarm System Toolkit (BEAST) for several years in addition to the Alarm Handler mainly to vacuum components. We have tried to include the magnet power supplies but found difficulties in treating old power supplies having large fluctuations of read-out values of their excitation currents in an appropriate manner. Our trials to overcome this problem will be presented.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA073

About •

paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA165

An Embedded IOC for 100 MeV Cyclotron RF Control

EPICS, controls, embedded, hardware

625

Z.G. Yin, X.L. Fu, X.T. Lu, T.J. Zhang
CIAE, Beijing, People’s Republic of China
X.E. Mu
North China University of Technology, Beijing, People’s Republic of China

An ARM9 based embedded controller for 100 MeV cyclotron RF control has been successfully developed and tested with EPICS control software. The controller is implemented as a 3U VME long card, located in the first slot of the LLRF control crate, as a supervise module that continuously monitors the status of the RF system through a costume designed backplane and related ADCs located on other boards in the crate. For high components density and signal integrate considerations, the PCB layout adopts a 6-layer design. The Debian GNU/Linux distribution for the ARM architecture has been selected as operating system for both robustness and convenience. EPICS device support as well as Linux driver routings has been written and tested to interface database records to the on board 12 multichannel 16-bit ADCs and DACs. In the meantime, a chip selecting encoding-decoding strategy has been implemented from both software and hardware aspects to extend the SPI bus of the AT91SAM9g20 processor. The detailed software as well as hardware designed will be reported in this paper.

Poster MOPHA165 [0.344 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA165

About •

paper received ※ 18 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)