ICALEPCS2019 - List of Keywords (LLRF)

Paper	Title	Other Keywords	Page
MOPHA053	Status of Control and Synchronization Systems Development at Institute of Electronic Systems	controls, FEL, cavity, electron	338
	M.G. Grzegrzółka, A. Abramowicz, A. Ciszewska, K. Czuba, B. Gąsowski, P.K. Jatczak, M. Kalisiak, T. Lesniak, M. Lipinski, T. Owczarek, R. Papis, I. Rutkowski, K. Sapór, M. Sawicka, D. Sikora, M. Urbański, L. Zembala, M. Żukociński Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
	Funding: This work was supported by the Polish Ministry of Science and Higher Education under Grant DIR/WK/2016/06 and DIR/WK/2016/03. Institute of Electronic Systems (ISE) at Warsaw University of Technology designs, builds and installs control and synchronization systems for several accelerator facilities. In recent years ISE together with the Deutsches Elektronen-Synchrotron (DESY) team created the RF synchronization system for the European XFEL in Hamburg. ISE is a key partner in several other projects for DESY flagship facilities. The group participated in development of the MTCA.4 standard and designed a family of components for the MTCA.4-based LLRF control system. Currently, ISE contributes to the development of the Master Oscillators for XFEL and FLASH, and phase reference distribution system for SINBAD. Since 2016 ISE is an in-kind partner for the European Spallation Source (ESS), working on the phase reference line for the ESS linac, components for 704.42 MHz LLRF control system, including a MTCA.4-based LO signal generation module and the Cavity Simulator. In 2019 ISE became one of the co-founders of the Polish Free-Electron Laser (PolFel) located in the National Centre for Nuclear Research in Świerk. The overview of the recent projects for large physics experiments ongoing at ISE is presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA053
About •	paper received ※ 01 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA114	Achieving Optimal Control of LLRF Control System with Artificial Intelligence	controls, cavity, SRF, framework	488
	R. Pirayesh, S. Biedron, J.A. Diaz Cruz, M. Martinez-Ramon, S.I. Sosa Guitron University of New Mexico, Albuquerque, New Mexico, USA
	Artificial Intelligence is a versatile tool to make machines learn the characteristics of a device or a system. In this research, we will be investigating applying deep learning and Gaussian process learning to make a machine learn the optimal settings of a low-level RF (LLRF) control system for particle accelerators. These settings include the multiple controllers’ parameters and the parameters of the LLRF that result in an optimal target function applied to the LLRF. Finding this target function, finding the right machine learning algorithm with the lowest error, and finding the best controller that result in the most optimal target function is the goal of this research.
	Poster MOPHA114 [0.847 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA114
About •	paper received ※ 09 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA124	Local Oscillator Rear Transition Module for 704.42 MHz LLRF Control System at ESS	controls, monitoring, cavity, operation	516
	I. Rutkowski, K. Czuba, M.G. Grzegrzółka Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
	Funding: Work supported by Polish Ministry of Science and Higher Education, decision number DIR/WK/2016/03. This paper describes the specifications, architecture, and measurements’ results of the MTCA-compliant Local Oscillator (LO) Rear Transition Module (RTM) board providing low phase noise clock and heterodyne signals for the 704.42 MHz Low Level Radio Frequency (LLRF) control system at the European Spallation Source (ESS). The clock generation and LO synthesis circuits are based on the module presented at ICALEPCS 2017. The conditioning circuits for the input and output signals must simultaneously achieve the desired impedance matching, spectral purity, output power as well as the phase noise requirements. The reference conditioning circuit presents an additional challenge due to input power range being significantly wider than the output range. The circuits monitoring the power levels of critical signals and voltages of supply rails for remote diagnostics as well as the programmable logic devices used to set the operating parameters via Zone3 connector are described.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA124
About •	paper received ※ 04 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP01	Hardware-in-the-Loop Testing of Accelerator Firmware	software, hardware, controls, FPGA	659
	C. Serrano, M. Betz, L.R. Doolittle, S. Paiagua, V.K. Vytla LBNL, Berkeley, California, USA
	Continuous Integration (CI) is widely used in industry, especially in the software world. Here we propose a combination of CI processes to run firmware and software tests both in simulation and on real hardware that can be well adapted to FPGA-based accelerator electronics designs. We have built a test rack with a variety of hardware platforms. Relying on source code version control tools, when a developer submits a change to the code base, a multi-stage test pipeline is triggered. Unit tests are run automatically, bitstreams are generated for the various supported FPGA platforms and loaded onto the FPGAs in the rack, and tests are run on hardware. Reports are generated upon test completion and notifications are sent to the developers in case of failure.
	Slides TUAPP01 [9.740 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP01
About •	paper received ※ 07 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP02	Development of the MTCA.4 I/O Cards for SPring-8 Upgrade and New 3 GeV Light Source	linac, cavity, FPGA, timing	665
	T. Fukui, N. Hosoda RIKEN SPring-8 Center, Innovative Light Sources Division, Hyogo, Japan M. Ishii JASRI/SPring-8, Hyogo-ken, Japan E. Iwai, H. Maesaka, T. Ohshima RIKEN SPring-8 Center, Sayo-cho, Sayo-gun, Hyogo, Japan
	We will start a full energy injection from the SACLA to the SPring-8 from next year as a part of the SPring-8 upgrade. For this, we developed several I/O cards with the MTCA.4 form factor. One of the key issues is a timing synchronization between SACLA and SPring-8. We implemented required functions on the FPGA logic of a commercially available I/O card. We develop a module to distribute a trigger and clocks. We also developed cards used for the beam position monitor (BPM) and low-level RF system (LLRF). Those are included two types of cards. One is a 16-bit digitizer used for LLRF for the SPring-8 since 2018 march. We will use the card for the BPM with modified FPGA logic. Second is an implementation of functions with the pulsed RF signals processed on the FPGA logic of a commercially available card. These functions are used for the BPM of the beam transport line from the SACLA to SPring-8. The existing system is used 1 Hz beam repetition but we need more than 10 Hz to achieve an injection time less than 20 minutes to maximize user time. We will report the performance of the MTCA.4 cards, the upgrade plan of the SPring-8, and the construction of the 3 GeV Light Source.
	Slides TUAPP02 [7.123 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP02
About •	paper received ※ 01 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA068	A Control System Using EtherCAT Technology for The Next-Generation Accelerator	controls, PLC, gun, vacuum	1258
	M. Ishii, M.T. Takeuchi JASRI/SPring-8, Hyogo-ken, Japan T. Fukui RIKEN SPring-8 Center, Innovative Light Sources Division, Hyogo, Japan C. Kondo JASRI, Hyogo, Japan
	The construction of a new 3 GeV Light Source is in progress. The 3 GeV Light Source will be designed a compact and stable Linac based on the C-band accelerator developed by SACLA. Furthermore, we have an upgrade project of SPring-8 that we call SPring-8-II. We adopted EtherCAT technology as a network fieldbus for the next-generation control system. Currently, as the control systems using EtherCAT, a low-level RF system and a new standard in-vacuum undulator system are running at the SPring-8 storage ring. Additionally, it is necessary to upgrade a high-power RF (HPRF) system at SACLA and a magnet power supply system. The current HPRF system consists of a VME and four PLCs. These PLCs are connected by an optical FA-Link that had been discontinued. Therefore, we will construct a new HPRF system that is replaced a VME with MTCA.4 and is used EtherCAT as a fieldbus. A fieldbus of a magnet power supply system will be replaced an old optical link with EtherCAT. The new systems will be verified into a prototype accelerator for the 3 GeV Light Source in SPring-8 site. The control systems using EtherCAT will be installed into the 3 GeV Light Source and SPring-8-II.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA068
About •	paper received ※ 30 September 2019 paper accepted ※ 09 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA105	Beam Synchronous Data Acquisition Using the Virtual Event Receiver	FEL, controls, timing, software	1347
	G. Mun, J. Hu, H.-S. Kang, C. Kim, G. Kim, W.W. Lee PAL, Pohang, Kyungbuk, Republic of Korea
	The 4th generation light source, PAL-XFEL, is an X-ray free electron laser in Pohang, Korea. One of key features of the event timing system in the PAL-XFEL, the beam synchronous acquisition is used in many beam diagnostics and analysis and the species of that increase gradually. In order to reduce the cost for event receivers which are required for operating the beam synchronous acquisition and to resolve the difficulty of the limited platform dependent on event receivers, we developed the virtual event receiver system receiving timestamps and BSA information from an event generator not using real event receivers. In this paper, we introduce the software architecture of the virtual event receiving system and present test results of it.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA105
About •	paper received ※ 18 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

MOPHA053

Status of Control and Synchronization Systems Development at Institute of Electronic Systems

controls, FEL, cavity, electron

338

M.G. Grzegrzółka, A. Abramowicz, A. Ciszewska, K. Czuba, B. Gąsowski, P.K. Jatczak, M. Kalisiak, T. Lesniak, M. Lipinski, T. Owczarek, R. Papis, I. Rutkowski, K. Sapór, M. Sawicka, D. Sikora, M. Urbański, L. Zembala, M. Żukociński
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland

Funding: This work was supported by the Polish Ministry of Science and Higher Education under Grant DIR/WK/2016/06 and DIR/WK/2016/03.
Institute of Electronic Systems (ISE) at Warsaw University of Technology designs, builds and installs control and synchronization systems for several accelerator facilities. In recent years ISE together with the Deutsches Elektronen-Synchrotron (DESY) team created the RF synchronization system for the European XFEL in Hamburg. ISE is a key partner in several other projects for DESY flagship facilities. The group participated in development of the MTCA.4 standard and designed a family of components for the MTCA.4-based LLRF control system. Currently, ISE contributes to the development of the Master Oscillators for XFEL and FLASH, and phase reference distribution system for SINBAD. Since 2016 ISE is an in-kind partner for the European Spallation Source (ESS), working on the phase reference line for the ESS linac, components for 704.42 MHz LLRF control system, including a MTCA.4-based LO signal generation module and the Cavity Simulator. In 2019 ISE became one of the co-founders of the Polish Free-Electron Laser (PolFel) located in the National Centre for Nuclear Research in Świerk. The overview of the recent projects for large physics experiments ongoing at ISE is presented.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA053

About •

paper received ※ 01 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA114

Achieving Optimal Control of LLRF Control System with Artificial Intelligence

controls, cavity, SRF, framework

488

R. Pirayesh, S. Biedron, J.A. Diaz Cruz, M. Martinez-Ramon, S.I. Sosa Guitron
University of New Mexico, Albuquerque, New Mexico, USA

Artificial Intelligence is a versatile tool to make machines learn the characteristics of a device or a system. In this research, we will be investigating applying deep learning and Gaussian process learning to make a machine learn the optimal settings of a low-level RF (LLRF) control system for particle accelerators. These settings include the multiple controllers’ parameters and the parameters of the LLRF that result in an optimal target function applied to the LLRF. Finding this target function, finding the right machine learning algorithm with the lowest error, and finding the best controller that result in the most optimal target function is the goal of this research.

Poster MOPHA114 [0.847 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA114

About •

paper received ※ 09 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

MOPHA124

Local Oscillator Rear Transition Module for 704.42 MHz LLRF Control System at ESS

controls, monitoring, cavity, operation

516

I. Rutkowski, K. Czuba, M.G. Grzegrzółka
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland

Funding: Work supported by Polish Ministry of Science and Higher Education, decision number DIR/WK/2016/03.
This paper describes the specifications, architecture, and measurements’ results of the MTCA-compliant Local Oscillator (LO) Rear Transition Module (RTM) board providing low phase noise clock and heterodyne signals for the 704.42 MHz Low Level Radio Frequency (LLRF) control system at the European Spallation Source (ESS). The clock generation and LO synthesis circuits are based on the module presented at ICALEPCS 2017. The conditioning circuits for the input and output signals must simultaneously achieve the desired impedance matching, spectral purity, output power as well as the phase noise requirements. The reference conditioning circuit presents an additional challenge due to input power range being significantly wider than the output range. The circuits monitoring the power levels of critical signals and voltages of supply rails for remote diagnostics as well as the programmable logic devices used to set the operating parameters via Zone3 connector are described.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA124

About •

paper received ※ 04 October 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP01

Hardware-in-the-Loop Testing of Accelerator Firmware

software, hardware, controls, FPGA

659

C. Serrano, M. Betz, L.R. Doolittle, S. Paiagua, V.K. Vytla
LBNL, Berkeley, California, USA

Continuous Integration (CI) is widely used in industry, especially in the software world. Here we propose a combination of CI processes to run firmware and software tests both in simulation and on real hardware that can be well adapted to FPGA-based accelerator electronics designs. We have built a test rack with a variety of hardware platforms. Relying on source code version control tools, when a developer submits a change to the code base, a multi-stage test pipeline is triggered. Unit tests are run automatically, bitstreams are generated for the various supported FPGA platforms and loaded onto the FPGAs in the rack, and tests are run on hardware. Reports are generated upon test completion and notifications are sent to the developers in case of failure.

Slides TUAPP01 [9.740 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP01

About •

paper received ※ 07 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPP02

Development of the MTCA.4 I/O Cards for SPring-8 Upgrade and New 3 GeV Light Source

linac, cavity, FPGA, timing

665

T. Fukui, N. Hosoda
RIKEN SPring-8 Center, Innovative Light Sources Division, Hyogo, Japan
M. Ishii
JASRI/SPring-8, Hyogo-ken, Japan
E. Iwai, H. Maesaka, T. Ohshima
RIKEN SPring-8 Center, Sayo-cho, Sayo-gun, Hyogo, Japan

We will start a full energy injection from the SACLA to the SPring-8 from next year as a part of the SPring-8 upgrade. For this, we developed several I/O cards with the MTCA.4 form factor. One of the key issues is a timing synchronization between SACLA and SPring-8. We implemented required functions on the FPGA logic of a commercially available I/O card. We develop a module to distribute a trigger and clocks. We also developed cards used for the beam position monitor (BPM) and low-level RF system (LLRF). Those are included two types of cards. One is a 16-bit digitizer used for LLRF for the SPring-8 since 2018 march. We will use the card for the BPM with modified FPGA logic. Second is an implementation of functions with the pulsed RF signals processed on the FPGA logic of a commercially available card. These functions are used for the BPM of the beam transport line from the SACLA to SPring-8. The existing system is used 1 Hz beam repetition but we need more than 10 Hz to achieve an injection time less than 20 minutes to maximize user time. We will report the performance of the MTCA.4 cards, the upgrade plan of the SPring-8, and the construction of the 3 GeV Light Source.

Slides TUAPP02 [7.123 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-TUAPP02

About •

paper received ※ 01 October 2019 paper accepted ※ 20 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA068

A Control System Using EtherCAT Technology for The Next-Generation Accelerator

controls, PLC, gun, vacuum

1258

M. Ishii, M.T. Takeuchi
JASRI/SPring-8, Hyogo-ken, Japan
T. Fukui
RIKEN SPring-8 Center, Innovative Light Sources Division, Hyogo, Japan
C. Kondo
JASRI, Hyogo, Japan

The construction of a new 3 GeV Light Source is in progress. The 3 GeV Light Source will be designed a compact and stable Linac based on the C-band accelerator developed by SACLA. Furthermore, we have an upgrade project of SPring-8 that we call SPring-8-II. We adopted EtherCAT technology as a network fieldbus for the next-generation control system. Currently, as the control systems using EtherCAT, a low-level RF system and a new standard in-vacuum undulator system are running at the SPring-8 storage ring. Additionally, it is necessary to upgrade a high-power RF (HPRF) system at SACLA and a magnet power supply system. The current HPRF system consists of a VME and four PLCs. These PLCs are connected by an optical FA-Link that had been discontinued. Therefore, we will construct a new HPRF system that is replaced a VME with MTCA.4 and is used EtherCAT as a fieldbus. A fieldbus of a magnet power supply system will be replaced an old optical link with EtherCAT. The new systems will be verified into a prototype accelerator for the 3 GeV Light Source in SPring-8 site. The control systems using EtherCAT will be installed into the 3 GeV Light Source and SPring-8-II.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA068

About •

paper received ※ 30 September 2019 paper accepted ※ 09 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPHA105

Beam Synchronous Data Acquisition Using the Virtual Event Receiver

FEL, controls, timing, software

1347

G. Mun, J. Hu, H.-S. Kang, C. Kim, G. Kim, W.W. Lee
PAL, Pohang, Kyungbuk, Republic of Korea

The 4th generation light source, PAL-XFEL, is an X-ray free electron laser in Pohang, Korea. One of key features of the event timing system in the PAL-XFEL, the beam synchronous acquisition is used in many beam diagnostics and analysis and the species of that increase gradually. In order to reduce the cost for event receivers which are required for operating the beam synchronous acquisition and to resolve the difficulty of the limited platform dependent on event receivers, we developed the virtual event receiver system receiving timestamps and BSA information from an event generator not using real event receivers. In this paper, we introduce the software architecture of the virtual event receiving system and present test results of it.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-WEPHA105

About •

paper received ※ 18 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)