ICALEPCS2017 - List of Keywords (Linux)

Paper	Title	Other Keywords	Page
TUAPL02	Porting VME-Based Optical-Link Remote I/O Module to a PLC Platform - An Approach to Maximize Cross-Platform Portability Using SoC	ion, controls, PLC, FPGA	125
	T. Masuda, A. Kiyomichi JASRI/SPring-8, Hyogo-ken, Japan
	The optical-link remote I/O system OPT-VME that consists of a VME master and several kinds of slave boards is widely used in SPring-8 and SACLA. As the next generation low-end platform instead of the outdated VMEbus, a Linux PLC such as Yokogawa e-RT3 has been considered. We have developed an e-RT3-based master module OPT-PLC to fully utilize a large number of existing remote boards. In the original system, low-level communication is performed by FPGA and high-level communication procedures are handled in the Solaris device driver on a VME CPU board. This driver becomes a barrier to port the system to e-RT3 platform. OPT-PLC should be handled by the e-RT3 standard driver in the same manner as other e-RT3 I/O modules. To solve the difficulty, OPT-PLC was equipped with Xilinx SoC and the high-level communication procedures were implemented as application software on ARM Linux in the SoC. As the result, OPT-PLC can be controlled through the standard e-RT3 driver. Furthermore, the system will be ported to other platform like PCI Express by replacing bus interface block in the PL part. This paper reports on our development as an approach to maximize cross-platform portability using SoC.
	Talk as video stream: https://youtu.be/ci5-NHBCLWM
	Slides TUAPL02 [7.627 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUAPL02
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPL03	Solving Vendor Lock-in in VME Single Board Computers through Open-sourcing of the PCIe-VME64x Bridge	ion, FPGA, interface, controls	131
	G. Daniluk, J.D. Gonzalez Cobas, M. Suminski, A. Wujek CERN, Geneva, Switzerland G. Gräbner, M. Miehling, T. Schnürer MEN, Nürnberg, Germany
	VME is a standard for modular electronics widely used in research institutes. Slave cards in a VME crate are controlled from a VME master, typically part of a Single Board Computer (SBC). The SBC typically runs an operating system and communicates with the VME bus through a PCI or PCIe-to-VME bridge chip. The de-facto standard bridge, TSI148, has recently been discontinued, and therefore the question arises about what bridging solution to use in new commercial SBC designs. This paper describes our effort to solve the VME bridge availability problem. Together with a commercial company, MEN, we have open-sourced their VHDL implementation of the PCIe-VME64x interface. We have created a new commodity which is free to be used in any SBC having an FPGA, thus avoiding vendor lock-in and providing a fertile ground for collaboration among institutes and companies around the VME platform. The article also describes the internals of the MEN PCIe-VME64x HDL core as well as the software package that comes with it.
	Talk as video stream: https://youtu.be/rEbUntNO-_Q
	Slides TUAPL03 [15.891 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUAPL03
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA021	Experiences Using Linux Based VME Controller Boards	ion, EPICS, controls, real-time	420
	D. Zimoch, D. Anicic PSI, Villigen PSI, Switzerland
	For many years, we have used a commercial real-time operating system to run EPICS on VME controller boards. However, with the availability of EPICS on Linux it became more and more charming to use Linux not only for PCs, but for VME controller boards as well. With a true multi-process environment, open source software and all standard Linux tools available, development and debugging promised to become much easier. Also the cost factor looked attractive, given that Linux is for free. However, we had to learn that there is no such thing as a free lunch. While developing EPICS support for the VME bus interface was quite straight forward, pitfalls waited at unexpected places. We present challenges and solutions encountered while making Linux based real-time VME controllers the main control system component in SwissFEL.
	Poster TUPHA021 [1.040 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA021
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA042	ADAPOS: An Architecture for Publishing ALICE DCS Conditions Data	ion, simulation, software, controls	482
	J.L. LÃ¥ng, A. Augustinus, P.M. Bond, P.Ch. Chochula, A.N. Kurepin, M. Lechman, O. Pinazza CERN, Geneva, Switzerland A.N. Kurepin RAS/INR, Moscow, Russia M. Lechman IP SAS, Bratislava, Slovak Republic O. Pinazza INFN-Bologna, Bologna, Italy
	ALICE Data Point Service (ADAPOS) is a software architecture being developed for the Run 3 period of LHC, as a part of the effort to transmit conditions data from ALICE Detector Control System (DCS) to GRID, for distributed processing. ADAPOS uses Distributed Information Management (DIM), 0MQ, and ALICE Data Point Processing Framework (ADAPRO). DIM and 0MQ are multi-purpose application-level network protocols. DIM and ADAPRO are being developed and maintained at CERN. ADAPRO is a multi-threaded application framework, supporting remote control, and also real-time features, such as thread affinities, records aligned with cache line boundaries, and memory locking. ADAPOS and ADAPRO are written in C++14 using OSS tools, Pthreads, and Linux API. The key processes of ADAPOS, Engine and Terminal, run on separate machines, facing different networks. Devices connected to DCS publish their state as DIM services. Engine gets updates to the services, and converts them into a binary stream. Terminal receives it over 0MQ, and maintains an image of the DCS state. It sends copies of the image, at regular intervals, over another 0MQ connection, to a readout process of ALICE Data Acquisition.
	Poster TUPHA042 [0.686 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA042
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA071	Run Control Communication for the Upgrade of the ATLAS Muon-to-Central Trigger Processor Interface (MUCTPI)	ion, software, controls, FPGA	571
	R. Spiwoks, A. Armbruster, G. Carrillo-Montoya, M. Chelstowska, P. Czodrowski, P.-O. Deviveiros, T. Eifert, N. Ellis, P. Farthouat, G. Galster, S. Haas, L. Helary, O. Lagkas Nikolos, A. Marzin, T. Pauly, V. Ryjov, K. Schmieden, M. Silva Oliveira, J. Stelzer, P. Vichoudis, T. Wengler CERN, Geneva, Switzerland
	The Muon-to-Central Trigger Processor Interface (MUCTPI) of the ATLAS experiment at the Large Hadron Collider (LHC) at CERN will be upgraded to an ATCA blade system for Run 3. The new design requires development of new communication models for control, configuration and monitoring. A System-on-Chip (SoC) with a programmable logic part and a processor part will be used for communication to the run control system and to the MUCTPI processing FPGAs. Different approaches have been compared. First, we tried an available UDP-based implementation in firmware for the programmable logic. Although this approach works as expected, it does not provide any flexibility to extend the functionality to more complex operations, e.g. for serial protocols. Second, we used the SoC processor with an embedded Linux operating system and an application-specific software written in C++ using a TCP remote-procedure-call approach. The software is built and maintained using the Yocto/OpenEmbedded framework. This approach was successfully used to test and validate the MUCTPI prototype. A third approach under investigation is the option of porting the ATLAS run control software directly to the embedded Linux.
	Poster TUPHA071 [0.722 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA071
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA184	Inspector, a Zero Code IDE for Control Systems User Interface Development	ion, controls, interface, software	861
	V. Costa, B. Lefort CERN, Geneva, Switzerland
	Developing operational User Interfaces (UI) can be challenging, especially during machine upgrade or commissioning where many changes can suddenly be required. An agile Integrated Development Environment (IDE) with enhanced refactoring capabilities can ease the development process. Inspector is an intuitive UI oriented IDE allowing for development of control interfaces and data processing. It features a state of the art visual interface composer fitted with an ample set of graphical components offering rich customization. It also integrates a scripting environment for soft real time data processing and UI scripting for complex interfaces. Furthermore, Inspector supports many data sources. Alongside the short application development time, it means Inspector can be used in early stages of device engineering or it can be used on top of a full control system stack to create elaborate high level control UIs. Inspector is now a mission critical tool at CERN providing agile features for creating and maintaining control system interfaces. It is intensively used by experts, machine operators and performs seamlessly from small test benches to complex instruments such as LHC or LINAC4.
	Poster TUPHA184 [1.378 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA184
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUSH302	uSOP: An Embedded Linux Board for the Belle2 Detector Controls	ion, EPICS, controls, software	1003
	G. Tortone, A. Anastasio, V. Izzo INFN-Napoli, Napoli, Italy A. Aloisio, F. Di Capua, R. Giordano University of Naples, Napoli, Italy F. Ameli INFN-Roma1, Rome, Italy P. Branchini roma3, Rome, Italy
	Control systems for scientific instruments and experiments would benefit from hardware and software platforms that provide flexible resources to fulfill various installation requirements. uSOP is a Single Board Computer based on ARM processor and Linux operating system that makes it possible to develop and deploy easily various control system frameworks (EPICS, Tango) supporting a variety of different buses (I2C, SPI, UART, JTAG), ADC, General Purpose and specialized digital IO. In this work we present a live demo of a uSOP board, showing a running IOC for a simple control task. We also describe the deployment of uSOP as a monitoring system architecture for the Belle2 experiment, presently under construction at the KEK Laboratory (Tsukuba, Japan).
	Poster TUSH302 [5.399 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUSH302
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPL05	The ELT Linux Development Environment	ion, software, target, framework	1125
	F. Pellegrin, C. Rosenquist ESO, Garching bei Muenchen, Germany
	The Extremely Large Telescope is a 39-metre ground-based telescope being built by ESO. It will be the largest optical/near-infrared telescope in the world and first light is foreseen for 2024. The overall ELT Linux development environment will be presented with an in-depth presentation of its core, the waf build system, and the customizations that ESO is currently developing. The ELT software development for telescopes and instruments poses many challenges to cover the different needs of such a complex system:a variety of technologies, Java, C/C++ and Python as programming languages, Qt5 as the GUI toolkit, communication frameworks such as OPCUA, DDS and ZeroMQ, the interaction with entities such as PLCs and real-time hardware, and users, in-house and not, looking at new usage patterns. All this optimized to be on time for the first light. To meet these requirements, a set of tools was selected. Its content ranges from an IDE, to compilers, interpreters, analysis and debugging tools for the various languages and operations. At the heart of the toolkit lies the modern build framework waf:a versatile tool written in Python selected due to its multiple language support and high performance.
	Talk as video stream: https://youtu.be/Wk3efalQnY4
	Slides THBPL05 [0.504 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPL05
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPA03	The Back-End Computer System for the Medipix Based PI-MEGA X-Ray Camera	ion, network, Ethernet, MMI	1149
	H.D. de Almeida, D. P. Magalhaes, M.A.L. Moraes, J.M. Polli LNLS, Campinas, Brazil
	The Brazilian Synchrotron, in partnership with BrPhotonics, is designing and developing pi-mega, a new X-Ray camera using Medipix chips, with the goal of building very large and fast cameras to supply Sirius' new demands. This work describes the design and testing of the back end computer system that will receive, process and store images. The back end system will use RDMA over Ethernet technology and must be able to process data at a rate ranging from 50 Gbps to 100 Gbps per pi-mega element. Multiple pi-mega elements may be combined to produce a large camera. Initial applications include tomographic reconstruction and coherent diffraction imaging techniques.
	Slides THBPA03 [1.918 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPA03
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA067	EtherCAT based DAQ system at ESS	ion, EPICS, real-time, Ethernet	1536
	J. Etxeberria, J.H. Lee ESS, Lund, Sweden
	The European Spallation Source (ESS) is a multi-disciplinary research facility based on what will be the world's most powerful-pulsed neutron source. The Integrated Control System Division (ICS) is responsible of defining and providing control systems for the ESS facility. This control system will be based on the EPICS and it must be high performance, cost-efficient, safe, reliable and easily maintainable. At the same time there is a strong need for standardization. To fulfill these requirements ICS has chosen different hardware platforms, like MicroTCA, PLC, EtherCAT, etc. EtherCAT, a Ethernet-based real-time fieldbus will be analyzed, and different questions will be answered: -Why has EtherCAT been chosen? -In which cases is it deployed? -How is it integrated into EPICS? -What is the installation process? Along with data acquisition purposes, the ESS Motion Control and Automation Group decided to use EtherCAT hardware to develop an Open Source EtherCAT Master Motion Controller, for the control of all the actuators of the accelerator within the ESS project. Hence, an overview of the open Source Motion Controller and its integration in EPICS will be also presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA067
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA215	A Control Architecture Proposal for Sirius Beamlines	ion, controls, hardware, EPICS	1947
	M.A.L. Moraes, R.M. Caliari, R.R. Geraldes, G.B.Z.L. Moreno, J.R. Piton, L. Sanfelici, H.D. de Almeida LNLS, Campinas, Brazil
	With the increased performance provided by 4th generation synchrotron light sources, precise motion control and event synchronization are essential factors to ensure experiment resolution and performance. Many advanced beamline systems, such as a new high-dynamic double crystal monochromator (HD-DCM), are under development for Sirius, the new machine under construction in Brazil. Among the expected performance challenges in such applications, complex coordinated movements during flyscans/continuous scans, hardware synchronization for pumpÂ-and-Âprobe experiments and active noise suppression are goals to be met. Two architectures are proposed to cover general-purpose and advanced applications. The HD-DCM controller was implemented in a MATLAB/Simulink environment, which is optimized for RCP. Hence, its software must be adapted to a more cost-effective platform. One candidate controller is the NI cRIO. The portability of both MATLAB and NI PXI, the present standard control platform at LNLS, codes to cRIO is evaluated in this paper. Control resolution, acquisition rates and other factors that might limit the performance of these advanced applications are also discussed.
	Poster THPHA215 [1.516 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA215
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

Porting VME-Based Optical-Link Remote I/O Module to a PLC Platform - An Approach to Maximize Cross-Platform Portability Using SoC

ion, controls, PLC, FPGA

125

T. Masuda, A. Kiyomichi
JASRI/SPring-8, Hyogo-ken, Japan

The optical-link remote I/O system OPT-VME that consists of a VME master and several kinds of slave boards is widely used in SPring-8 and SACLA. As the next generation low-end platform instead of the outdated VMEbus, a Linux PLC such as Yokogawa e-RT3 has been considered. We have developed an e-RT3-based master module OPT-PLC to fully utilize a large number of existing remote boards. In the original system, low-level communication is performed by FPGA and high-level communication procedures are handled in the Solaris device driver on a VME CPU board. This driver becomes a barrier to port the system to e-RT3 platform. OPT-PLC should be handled by the e-RT3 standard driver in the same manner as other e-RT3 I/O modules. To solve the difficulty, OPT-PLC was equipped with Xilinx SoC and the high-level communication procedures were implemented as application software on ARM Linux in the SoC. As the result, OPT-PLC can be controlled through the standard e-RT3 driver. Furthermore, the system will be ported to other platform like PCI Express by replacing bus interface block in the PL part. This paper reports on our development as an approach to maximize cross-platform portability using SoC.

Talk as video stream: https://youtu.be/ci5-NHBCLWM

Slides TUAPL02 [7.627 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUAPL02

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUAPL03

Solving Vendor Lock-in in VME Single Board Computers through Open-sourcing of the PCIe-VME64x Bridge

ion, FPGA, interface, controls

131

G. Daniluk, J.D. Gonzalez Cobas, M. Suminski, A. Wujek
CERN, Geneva, Switzerland
G. Gräbner, M. Miehling, T. Schnürer
MEN, Nürnberg, Germany

VME is a standard for modular electronics widely used in research institutes. Slave cards in a VME crate are controlled from a VME master, typically part of a Single Board Computer (SBC). The SBC typically runs an operating system and communicates with the VME bus through a PCI or PCIe-to-VME bridge chip. The de-facto standard bridge, TSI148, has recently been discontinued, and therefore the question arises about what bridging solution to use in new commercial SBC designs. This paper describes our effort to solve the VME bridge availability problem. Together with a commercial company, MEN, we have open-sourced their VHDL implementation of the PCIe-VME64x interface. We have created a new commodity which is free to be used in any SBC having an FPGA, thus avoiding vendor lock-in and providing a fertile ground for collaboration among institutes and companies around the VME platform. The article also describes the internals of the MEN PCIe-VME64x HDL core as well as the software package that comes with it.

Talk as video stream: https://youtu.be/rEbUntNO-_Q

Slides TUAPL03 [15.891 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUAPL03

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA021

Experiences Using Linux Based VME Controller Boards

ion, EPICS, controls, real-time

420

D. Zimoch, D. Anicic
PSI, Villigen PSI, Switzerland

For many years, we have used a commercial real-time operating system to run EPICS on VME controller boards. However, with the availability of EPICS on Linux it became more and more charming to use Linux not only for PCs, but for VME controller boards as well. With a true multi-process environment, open source software and all standard Linux tools available, development and debugging promised to become much easier. Also the cost factor looked attractive, given that Linux is for free. However, we had to learn that there is no such thing as a free lunch. While developing EPICS support for the VME bus interface was quite straight forward, pitfalls waited at unexpected places. We present challenges and solutions encountered while making Linux based real-time VME controllers the main control system component in SwissFEL.

Poster TUPHA021 [1.040 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA021

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA042

ADAPOS: An Architecture for Publishing ALICE DCS Conditions Data

ion, simulation, software, controls

482

J.L. LÃ¥ng, A. Augustinus, P.M. Bond, P.Ch. Chochula, A.N. Kurepin, M. Lechman, O. Pinazza
CERN, Geneva, Switzerland
A.N. Kurepin
RAS/INR, Moscow, Russia
M. Lechman
IP SAS, Bratislava, Slovak Republic
O. Pinazza
INFN-Bologna, Bologna, Italy

ALICE Data Point Service (ADAPOS) is a software architecture being developed for the Run 3 period of LHC, as a part of the effort to transmit conditions data from ALICE Detector Control System (DCS) to GRID, for distributed processing. ADAPOS uses Distributed Information Management (DIM), 0MQ, and ALICE Data Point Processing Framework (ADAPRO). DIM and 0MQ are multi-purpose application-level network protocols. DIM and ADAPRO are being developed and maintained at CERN. ADAPRO is a multi-threaded application framework, supporting remote control, and also real-time features, such as thread affinities, records aligned with cache line boundaries, and memory locking. ADAPOS and ADAPRO are written in C++14 using OSS tools, Pthreads, and Linux API. The key processes of ADAPOS, Engine and Terminal, run on separate machines, facing different networks. Devices connected to DCS publish their state as DIM services. Engine gets updates to the services, and converts them into a binary stream. Terminal receives it over 0MQ, and maintains an image of the DCS state. It sends copies of the image, at regular intervals, over another 0MQ connection, to a readout process of ALICE Data Acquisition.

Poster TUPHA042 [0.686 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA042

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA071

Run Control Communication for the Upgrade of the ATLAS Muon-to-Central Trigger Processor Interface (MUCTPI)

ion, software, controls, FPGA

571

R. Spiwoks, A. Armbruster, G. Carrillo-Montoya, M. Chelstowska, P. Czodrowski, P.-O. Deviveiros, T. Eifert, N. Ellis, P. Farthouat, G. Galster, S. Haas, L. Helary, O. Lagkas Nikolos, A. Marzin, T. Pauly, V. Ryjov, K. Schmieden, M. Silva Oliveira, J. Stelzer, P. Vichoudis, T. Wengler
CERN, Geneva, Switzerland

The Muon-to-Central Trigger Processor Interface (MUCTPI) of the ATLAS experiment at the Large Hadron Collider (LHC) at CERN will be upgraded to an ATCA blade system for Run 3. The new design requires development of new communication models for control, configuration and monitoring. A System-on-Chip (SoC) with a programmable logic part and a processor part will be used for communication to the run control system and to the MUCTPI processing FPGAs. Different approaches have been compared. First, we tried an available UDP-based implementation in firmware for the programmable logic. Although this approach works as expected, it does not provide any flexibility to extend the functionality to more complex operations, e.g. for serial protocols. Second, we used the SoC processor with an embedded Linux operating system and an application-specific software written in C++ using a TCP remote-procedure-call approach. The software is built and maintained using the Yocto/OpenEmbedded framework. This approach was successfully used to test and validate the MUCTPI prototype. A third approach under investigation is the option of porting the ATLAS run control software directly to the embedded Linux.

Poster TUPHA071 [0.722 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA071

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUPHA184

Inspector, a Zero Code IDE for Control Systems User Interface Development

ion, controls, interface, software

861

V. Costa, B. Lefort
CERN, Geneva, Switzerland

Developing operational User Interfaces (UI) can be challenging, especially during machine upgrade or commissioning where many changes can suddenly be required. An agile Integrated Development Environment (IDE) with enhanced refactoring capabilities can ease the development process. Inspector is an intuitive UI oriented IDE allowing for development of control interfaces and data processing. It features a state of the art visual interface composer fitted with an ample set of graphical components offering rich customization. It also integrates a scripting environment for soft real time data processing and UI scripting for complex interfaces. Furthermore, Inspector supports many data sources. Alongside the short application development time, it means Inspector can be used in early stages of device engineering or it can be used on top of a full control system stack to create elaborate high level control UIs. Inspector is now a mission critical tool at CERN providing agile features for creating and maintaining control system interfaces. It is intensively used by experts, machine operators and performs seamlessly from small test benches to complex instruments such as LHC or LINAC4.

Poster TUPHA184 [1.378 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA184

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

TUSH302

uSOP: An Embedded Linux Board for the Belle2 Detector Controls

ion, EPICS, controls, software

1003

G. Tortone, A. Anastasio, V. Izzo
INFN-Napoli, Napoli, Italy
A. Aloisio, F. Di Capua, R. Giordano
University of Naples, Napoli, Italy
F. Ameli
INFN-Roma1, Rome, Italy
P. Branchini
roma3, Rome, Italy

Control systems for scientific instruments and experiments would benefit from hardware and software platforms that provide flexible resources to fulfill various installation requirements. uSOP is a Single Board Computer based on ARM processor and Linux operating system that makes it possible to develop and deploy easily various control system frameworks (EPICS, Tango) supporting a variety of different buses (I2C, SPI, UART, JTAG), ADC, General Purpose and specialized digital IO. In this work we present a live demo of a uSOP board, showing a running IOC for a simple control task. We also describe the deployment of uSOP as a monitoring system architecture for the Belle2 experiment, presently under construction at the KEK Laboratory (Tsukuba, Japan).

Poster TUSH302 [5.399 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUSH302

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPL05

The ELT Linux Development Environment

ion, software, target, framework

1125

F. Pellegrin, C. Rosenquist
ESO, Garching bei Muenchen, Germany

The Extremely Large Telescope is a 39-metre ground-based telescope being built by ESO. It will be the largest optical/near-infrared telescope in the world and first light is foreseen for 2024. The overall ELT Linux development environment will be presented with an in-depth presentation of its core, the waf build system, and the customizations that ESO is currently developing. The ELT software development for telescopes and instruments poses many challenges to cover the different needs of such a complex system:a variety of technologies, Java, C/C++ and Python as programming languages, Qt5 as the GUI toolkit, communication frameworks such as OPCUA, DDS and ZeroMQ, the interaction with entities such as PLCs and real-time hardware, and users, in-house and not, looking at new usage patterns. All this optimized to be on time for the first light. To meet these requirements, a set of tools was selected. Its content ranges from an IDE, to compilers, interpreters, analysis and debugging tools for the various languages and operations. At the heart of the toolkit lies the modern build framework waf:a versatile tool written in Python selected due to its multiple language support and high performance.

Talk as video stream: https://youtu.be/Wk3efalQnY4

Slides THBPL05 [0.504 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPL05

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPA03

The Back-End Computer System for the Medipix Based PI-MEGA X-Ray Camera

ion, network, Ethernet, MMI

1149

H.D. de Almeida, D. P. Magalhaes, M.A.L. Moraes, J.M. Polli
LNLS, Campinas, Brazil

The Brazilian Synchrotron, in partnership with BrPhotonics, is designing and developing pi-mega, a new X-Ray camera using Medipix chips, with the goal of building very large and fast cameras to supply Sirius' new demands. This work describes the design and testing of the back end computer system that will receive, process and store images. The back end system will use RDMA over Ethernet technology and must be able to process data at a rate ranging from 50 Gbps to 100 Gbps per pi-mega element. Multiple pi-mega elements may be combined to produce a large camera. Initial applications include tomographic reconstruction and coherent diffraction imaging techniques.

Slides THBPA03 [1.918 MB]

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reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPA03

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THPHA067

EtherCAT based DAQ system at ESS

ion, EPICS, real-time, Ethernet

1536

J. Etxeberria, J.H. Lee
ESS, Lund, Sweden

The European Spallation Source (ESS) is a multi-disciplinary research facility based on what will be the world's most powerful-pulsed neutron source. The Integrated Control System Division (ICS) is responsible of defining and providing control systems for the ESS facility. This control system will be based on the EPICS and it must be high performance, cost-efficient, safe, reliable and easily maintainable. At the same time there is a strong need for standardization. To fulfill these requirements ICS has chosen different hardware platforms, like MicroTCA, PLC, EtherCAT, etc. EtherCAT, a Ethernet-based real-time fieldbus will be analyzed, and different questions will be answered: -Why has EtherCAT been chosen? -In which cases is it deployed? -How is it integrated into EPICS? -What is the installation process? Along with data acquisition purposes, the ESS Motion Control and Automation Group decided to use EtherCAT hardware to develop an Open Source EtherCAT Master Motion Controller, for the control of all the actuators of the accelerator within the ESS project. Hence, an overview of the open Source Motion Controller and its integration in EPICS will be also presented.

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reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA067

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THPHA215

A Control Architecture Proposal for Sirius Beamlines

ion, controls, hardware, EPICS

1947

M.A.L. Moraes, R.M. Caliari, R.R. Geraldes, G.B.Z.L. Moreno, J.R. Piton, L. Sanfelici, H.D. de Almeida
LNLS, Campinas, Brazil

With the increased performance provided by 4th generation synchrotron light sources, precise motion control and event synchronization are essential factors to ensure experiment resolution and performance. Many advanced beamline systems, such as a new high-dynamic double crystal monochromator (HD-DCM), are under development for Sirius, the new machine under construction in Brazil. Among the expected performance challenges in such applications, complex coordinated movements during flyscans/continuous scans, hardware synchronization for pumpÂ-and-Âprobe experiments and active noise suppression are goals to be met. Two architectures are proposed to cover general-purpose and advanced applications. The HD-DCM controller was implemented in a MATLAB/Simulink environment, which is optimized for RCP. Hence, its software must be adapted to a more cost-effective platform. One candidate controller is the NI cRIO. The portability of both MATLAB and NI PXI, the present standard control platform at LNLS, codes to cRIO is evaluated in this paper. Control resolution, acquisition rates and other factors that might limit the performance of these advanced applications are also discussed.

Poster THPHA215 [1.516 MB]

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reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA215

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