ICALEPCS2017 - List of Keywords (Ethernet)

Paper	Title	Other Keywords	Page
TUPHA091	A Reliable White Rabbit Network for the FAIR General Timing Machine	ion, network, timing, monitoring	627
	C. Prados, J.N. Bai, A. Hahn GSI, Darmstadt, Germany A. Suresh. Suresh Hochschule Darmstadt, University of Applied Science, Darmstadt, Germany
	A new timing system based on White Rabbit (WR) is being developed for the upcoming FAIR facility at GSI in collaboration with CERN and other partners. The General Timing Machine (GTM) is responsible for the synchronization of nodes and distribution of timing events, which allows the real-time control of the accelerator equipment. WR is a time-deterministic, low latency Ethernet-based network for general data transfer and sub-ns time and frequency distribution. The FAIR WR network is considered operational only if it provides deterministic and resilient data delivery and reliable time distribution. In order to achieve this level of service, methods and techniques to increase the reliability of the GTM and WR network has been studied and evaluated. Besides, GSI has developed a network monitoring and logging system to measure the performance and detect failures of the WR network. Finally, we describe the continuous integration system at GSI and how it has improve the overall reliability of the GTM.
	Poster TUPHA091 [0.630 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA091
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPA03	The Back-End Computer System for the Medipix Based PI-MEGA X-Ray Camera	ion, Linux, network, MMI	1149
	H.D. de Almeida, D. P. Magalhaes, M.A.L. Moraes, J.M. Polli LNLS, Campinas, Brazil
	The Brazilian Synchrotron, in partnership with BrPhotonics, is designing and developing pi-mega, a new X-Ray camera using Medipix chips, with the goal of building very large and fast cameras to supply Sirius' new demands. This work describes the design and testing of the back end computer system that will receive, process and store images. The back end system will use RDMA over Ethernet technology and must be able to process data at a rate ranging from 50 Gbps to 100 Gbps per pi-mega element. Multiple pi-mega elements may be combined to produce a large camera. Initial applications include tomographic reconstruction and coherent diffraction imaging techniques.
	Slides THBPA03 [1.918 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPA03
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THMPL08	The SLAC Common-Platform Firmware for High-Performance Systems	ion, interface, FPGA, network	1286
	T. Straumann, R. Claus, J.M. D'Ewart, J.C. Frisch, G. Haller, R.T. Herbst, B. Hong, U. Legat, L. Ma, J.J. Olsen, B.A. Reese, R. Ruckman, L. Sapozhnikov, S.R. Smith, D. Van Winkle, J.A. Vásquez, M. Weaver, E. Williams, C. Xu, A. Young SLAC, Menlo Park, California, USA
	Funding: Work supported by the US Department of Energy, Office of Science under contract DE-AC02-76SF00515 LCLS-II's high beam rate of almost 1MHz and the requirement that several "high-performance" systems (such as MPS, BPM, LLRF, timing etc.) shall resolve individual bunches precludes the use of a traditional software based control system but requires many core services to be implemented in FPGA logic. SLAC has created a comprehensive open-source firmware framework which implements many commonly used blocks (e.g., timing, globally-synchronized fast data buffers, MPS, diagnostic data capture), libraries (Ethernet protocol stack, AXI interconnect, FIFOs, memory etc.) and interfaces (e.g., for timing, diagnostic data etc.) thus providing a versatile platform on top of which powerful high-performance systems can be built and rapidly integrated.
	Slides THMPL08 [0.579 MB]
	Poster THMPL08 [0.630 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THMPL08
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA067	EtherCAT based DAQ system at ESS	ion, EPICS, real-time, Linux	1536
	J. Etxeberria, J.H. Lee ESS, Lund, Sweden
	The European Spallation Source (ESS) is a multi-disciplinary research facility based on what will be the world's most powerful-pulsed neutron source. The Integrated Control System Division (ICS) is responsible of defining and providing control systems for the ESS facility. This control system will be based on the EPICS and it must be high performance, cost-efficient, safe, reliable and easily maintainable. At the same time there is a strong need for standardization. To fulfill these requirements ICS has chosen different hardware platforms, like MicroTCA, PLC, EtherCAT, etc. EtherCAT, a Ethernet-based real-time fieldbus will be analyzed, and different questions will be answered: -Why has EtherCAT been chosen? -In which cases is it deployed? -How is it integrated into EPICS? -What is the installation process? Along with data acquisition purposes, the ESS Motion Control and Automation Group decided to use EtherCAT hardware to develop an Open Source EtherCAT Master Motion Controller, for the control of all the actuators of the accelerator within the ESS project. Hence, an overview of the open Source Motion Controller and its integration in EPICS will be also presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA067
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA069	Control System for Atlas Tilecal HVremote Boards	ion, controls, interface, electron	1543
	F. Martins, A. Gomes, L. Gurriana, A. Maio, L. Seabra LIP, Lisboa, Portugal G.G. Evans, A. Gomes, A. Maio, C. Rato, J.M. Sabino, J.A. Soares Augusto FCUL, Lisboa, Portugal G.G. Evans BioISI, Lisboa, Portugal J.A. Soares Augusto Inesc-ID, Lisboa, Portugal
	Funding: Funding from FCT (Portuguese government funding agency of the MCTES); project "ColaboracÃ£o na ExperiÃªncia ATLAS", CERN/FISNUC/0005/2015 One of the proposed solutions for upgrading the high voltage (HV) system of Tilecal, the ATLAS hadron calorimeter, consists in removing the HV regulation boards from the detector and deploying them in a low-radiation room where there is permanent access for maintenance. This option requires many ~100m long HV cables but removes the requirement of radiation hard boards. That solution simplifies the control system of the HV regulation cards (called HVRemote). It consists of a Detector Control System (DCS) node linked to 256 HVRemote boards through a tree of Ethernet connections. Each HVRemote includes a smart Ethernet transceiver for converting data and commands from the DCS into serial peripheral interface (SPI) signals routed to SPI-capable devices in the HVRemote. The DCS connection to the transceiver and the control of some SPI-capable devices via Ethernet has been tested successfully. It was fabricated a test board (HVRemote-ctrl) with the interfacing sub-system of the HVRemote. It is being tested through SPI-interfaces and several devices were already validated. A next version adds a few more ADC/DAC devices for checking their suitability for the final design.
	Poster THPHA069 [0.404 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA069
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA147	Conceptual Design of Vacuum Control System for ILSF	controls, vacuum, ion, PLC	1732
	A. Khalilzadeh, M. Akbari, M. Jafarzadeh, J. Rahighi ILSF, Tehran, Iran
	Funding: ILSF The Iranian Light Source Facility (ILSF) is a new 3 GeV third generation synchrotron light source facility with circumference of 528 m, which is in the design stage. In this paper conceptual design of vacuum control system is presented. The control system architecture, Software toolkit and controller in device layer are discussed in this paper.
	Poster THPHA147 [2.578 MB]
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA147
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Other Keywords

Page

TUPHA091

A Reliable White Rabbit Network for the FAIR General Timing Machine

ion, network, timing, monitoring

627

C. Prados, J.N. Bai, A. Hahn
GSI, Darmstadt, Germany
A. Suresh. Suresh
Hochschule Darmstadt, University of Applied Science, Darmstadt, Germany

A new timing system based on White Rabbit (WR) is being developed for the upcoming FAIR facility at GSI in collaboration with CERN and other partners. The General Timing Machine (GTM) is responsible for the synchronization of nodes and distribution of timing events, which allows the real-time control of the accelerator equipment. WR is a time-deterministic, low latency Ethernet-based network for general data transfer and sub-ns time and frequency distribution. The FAIR WR network is considered operational only if it provides deterministic and resilient data delivery and reliable time distribution. In order to achieve this level of service, methods and techniques to increase the reliability of the GTM and WR network has been studied and evaluated. Besides, GSI has developed a network monitoring and logging system to measure the performance and detect failures of the WR network. Finally, we describe the continuous integration system at GSI and how it has improve the overall reliability of the GTM.

Poster TUPHA091 [0.630 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-TUPHA091

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THBPA03

The Back-End Computer System for the Medipix Based PI-MEGA X-Ray Camera

ion, Linux, network, MMI

1149

H.D. de Almeida, D. P. Magalhaes, M.A.L. Moraes, J.M. Polli
LNLS, Campinas, Brazil

The Brazilian Synchrotron, in partnership with BrPhotonics, is designing and developing pi-mega, a new X-Ray camera using Medipix chips, with the goal of building very large and fast cameras to supply Sirius' new demands. This work describes the design and testing of the back end computer system that will receive, process and store images. The back end system will use RDMA over Ethernet technology and must be able to process data at a rate ranging from 50 Gbps to 100 Gbps per pi-mega element. Multiple pi-mega elements may be combined to produce a large camera. Initial applications include tomographic reconstruction and coherent diffraction imaging techniques.

Slides THBPA03 [1.918 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THBPA03

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THMPL08

The SLAC Common-Platform Firmware for High-Performance Systems

ion, interface, FPGA, network

1286

T. Straumann, R. Claus, J.M. D'Ewart, J.C. Frisch, G. Haller, R.T. Herbst, B. Hong, U. Legat, L. Ma, J.J. Olsen, B.A. Reese, R. Ruckman, L. Sapozhnikov, S.R. Smith, D. Van Winkle, J.A. Vásquez, M. Weaver, E. Williams, C. Xu, A. Young
SLAC, Menlo Park, California, USA

Funding: Work supported by the US Department of Energy, Office of Science under contract DE-AC02-76SF00515
LCLS-II's high beam rate of almost 1MHz and the requirement that several "high-performance" systems (such as MPS, BPM, LLRF, timing etc.) shall resolve individual bunches precludes the use of a traditional software based control system but requires many core services to be implemented in FPGA logic. SLAC has created a comprehensive open-source firmware framework which implements many commonly used blocks (e.g., timing, globally-synchronized fast data buffers, MPS, diagnostic data capture), libraries (Ethernet protocol stack, AXI interconnect, FIFOs, memory etc.) and interfaces (e.g., for timing, diagnostic data etc.) thus providing a versatile platform on top of which powerful high-performance systems can be built and rapidly integrated.

Slides THMPL08 [0.579 MB]

Poster THMPL08 [0.630 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THMPL08

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA067

EtherCAT based DAQ system at ESS

ion, EPICS, real-time, Linux

1536

J. Etxeberria, J.H. Lee
ESS, Lund, Sweden

The European Spallation Source (ESS) is a multi-disciplinary research facility based on what will be the world's most powerful-pulsed neutron source. The Integrated Control System Division (ICS) is responsible of defining and providing control systems for the ESS facility. This control system will be based on the EPICS and it must be high performance, cost-efficient, safe, reliable and easily maintainable. At the same time there is a strong need for standardization. To fulfill these requirements ICS has chosen different hardware platforms, like MicroTCA, PLC, EtherCAT, etc. EtherCAT, a Ethernet-based real-time fieldbus will be analyzed, and different questions will be answered: -Why has EtherCAT been chosen? -In which cases is it deployed? -How is it integrated into EPICS? -What is the installation process? Along with data acquisition purposes, the ESS Motion Control and Automation Group decided to use EtherCAT hardware to develop an Open Source EtherCAT Master Motion Controller, for the control of all the actuators of the accelerator within the ESS project. Hence, an overview of the open Source Motion Controller and its integration in EPICS will be also presented.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA067

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA069

Control System for Atlas Tilecal HVremote Boards

ion, controls, interface, electron

1543

F. Martins, A. Gomes, L. Gurriana, A. Maio, L. Seabra
LIP, Lisboa, Portugal
G.G. Evans, A. Gomes, A. Maio, C. Rato, J.M. Sabino, J.A. Soares Augusto
FCUL, Lisboa, Portugal
G.G. Evans
BioISI, Lisboa, Portugal
J.A. Soares Augusto
Inesc-ID, Lisboa, Portugal

Funding: Funding from FCT (Portuguese government funding agency of the MCTES); project "ColaboracÃ£o na ExperiÃªncia ATLAS", CERN/FISNUC/0005/2015
One of the proposed solutions for upgrading the high voltage (HV) system of Tilecal, the ATLAS hadron calorimeter, consists in removing the HV regulation boards from the detector and deploying them in a low-radiation room where there is permanent access for maintenance. This option requires many ~100m long HV cables but removes the requirement of radiation hard boards. That solution simplifies the control system of the HV regulation cards (called HVRemote). It consists of a Detector Control System (DCS) node linked to 256 HVRemote boards through a tree of Ethernet connections. Each HVRemote includes a smart Ethernet transceiver for converting data and commands from the DCS into serial peripheral interface (SPI) signals routed to SPI-capable devices in the HVRemote. The DCS connection to the transceiver and the control of some SPI-capable devices via Ethernet has been tested successfully. It was fabricated a test board (HVRemote-ctrl) with the interfacing sub-system of the HVRemote. It is being tested through SPI-interfaces and several devices were already validated. A next version adds a few more ADC/DAC devices for checking their suitability for the final design.

Poster THPHA069 [0.404 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA069

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THPHA147

Conceptual Design of Vacuum Control System for ILSF

controls, vacuum, ion, PLC

1732

A. Khalilzadeh, M. Akbari, M. Jafarzadeh, J. Rahighi
ILSF, Tehran, Iran

Funding: ILSF
The Iranian Light Source Facility (ILSF) is a new 3 GeV third generation synchrotron light source facility with circumference of 528 m, which is in the design stage. In this paper conceptual design of vacuum control system is presented. The control system architecture, Software toolkit and controller in device layer are discussed in this paper.

Poster THPHA147 [2.578 MB]

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2017-THPHA147

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)