IPAC2015 - List of Keywords (FPGA)

Paper	Title	Other Keywords	Page
MOPHA012	A New FPGA Based Timing System at ELSA	timing, injection, booster, extraction	802
	D. Proft, W. Hillert ELSA, Bonn, Germany
	At the electron stretcher facility ELSA a beam intensity upgrade from 20 mA to 200 mA is in progress. Investigations showed, that the maximum beam current is currently limited by excitation of beam instabilities. For separated characterization of single bunch instabilities from multi-bunch ones, a high beam current stored in a single revolving bunch is required. These high beam currents can only be achieved by accumulation of many shots from the injector. The existing timing system is not capable of single bunch injection and accumulation in the main stretcher ring. Therefore a new FPGA based timing system, synchronized to the RF system of the accelerator, has been developed which will completely supersede the existing one. Simultaneously the ‘‘slow'' timing system, providing trigger signals for the typically 6 s long accelerator cycle, is also modernized using a similar FPGA based solution to achieve a much better duty cycle during standard operation. In this contribution the FPGA designs laying the focus on the single bunch accumulation will be presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPHA012
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MOPHA044	Testing a Digital Beam Position Stabilization for the P2-experiment at MESA	experiment, feedback, controls, electron	888
	M. Dehn, K. Aulenbacher, J. Diefenbach, F. Fichtner, R. Herbertz, W. Klag IKP, Mainz, Germany
	Funding: Work supported by the German Federal Ministry of Education and Research (BMBF) and German Research Foundation (DFG) under the Collaborative Research Center 1044 and the Cluster of Excellence "PRISMA" The Mainz Energy recovering Superconducting Accelerator (MESA) will be built at the institute for nuclear physics at Mainz University. Besides the multi-turn energy recovery mode an external beam mode is foreseen to provide 155 MeV electrons of 85% polarization at 150 μA for parity violating experiments. To achieve the required stability of the main beam parameters a dedicated digital position stabilization is currently developed and tested at the Mainz Microtron (MAMI).
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MOPTY008	Preliminary Hardware Implementation of Compensation Mechanism of Superconducting Cavity Failure in C-ADS Linac	hardware, linac, cavity, proton	953
	Z. Xue, J.P. Dai IHEP, Beijing, People's Republic of China L. Cheng, Y. Yang SINANO, Suzhou, People's Republic of China
	For the proton linear accelerators used in applications such as ADS, due to the nature of the operation, it is essential to have beam failures at the rate several orders of magnitude lower than usual performance of similar accelerators. In order to achieve this extremely high performance reliability requirement, in addition to hardware improvement, a failure tolerant design is mandatory. A compensation mechanism to cope with hardware failure, mainly RF failures of superconducting cavities, will be in place in order to maintain the high uptime, short recovery time and extremely low frequency of beam loss. The hardware implementation of the mechanism poses high challenges due to the extremely tight timing constraints, high logic complexity, and mostly important, high flexibility and short turnaround time due to varying operation contexts. We will explore the hardware implementation of the scheme using fast electronic devices and Field Programmable Gate Array (FPGA). In order to achieve the goals of short recovery time and flexibility in compensation algorithms, an advanced hardware design methodology including high-level synthesis will be used.
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MOPTY012	Design and Test of Prototype of LLRF System for KIPT Neutron Source LINAC	LLRF, controls, linac, EPICS	959
	X.P. Ma, Y.L. Chi, R.L. Liu IHEP, Beijing, People's Republic of China S. Shu Institute of High Energy Physics (IHEP), Chinese Academy of Sciences, Beijing, People's Republic of China
	A 100 MeV/100 kW electron LINAC is being constructed by IHEP, China for the NSC KIPT Neutron Source project in Ukraine. A LLRF system is required to produce the driver RF input of the klystron and maintain the accelerating phase and amplitude stability of the machine. The LLRF system consists of an RF reference distribution system, six identical control units, and the fast RF interlock module. The main part of control unit is the PXI-bus crate implemented with PXI9846 - 4 ADC digitizer board and ICS572 - high speed 2 ADC/2 DAC signal process board. An EPICS IOC based on WinDriver as the PCI device driver is developed and tested. Preliminary results show phase detect resolution of 0.03 degree (rms) of 2856 MHz signal has been achieved. *Mail Address: maxp@ihep.ac.cn
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MOPTY020	An Intelligent Trigger Abnormal Beam Operation Monitoring Processor at the SSRF	monitoring, operation, injection, status	978
	L.W. Lai, Z.C. Chen, Y.B. Leng, Y.B. Yan SSRF, Shanghai, People's Republic of China
	Funding: Work supported by National Nature Science Fundation of China(11305253)(11375255)(11105211) An intelligent trigger abnormal beam operation monitoring processor has been designed at the SSRF. By applying digital signal processing algorithms in FPGA, the processor keeps monitoring the beam operation status. It will output a trigger signal and store the turn-by-turn beam position data when abnormal events detected. The abnormal events include injection, beam loss, and abnormal disturbance. This ability makes the processor a powerful tool for abnormal operation causes analysing and machine study.
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MOPTY022	Bunch by Bunch DBPM Processor Development and Preliminary Experiment in SSRF*	injection, hardware, betatron, experiment	984
	Y.B. Leng, Z.C. Chen, L.W. Lai, Y.B. Yan, Y. Yang SSRF, Shanghai, People's Republic of China
	Funding: Work supported by Chinese NSFC11375255. Digital BPM processor with turn-by-turn capability has been widely used in synchrotron radiation facilities over the world, which is proved to be very useful and powerful for daily operation and linear optics study but not good enough in the case of individual bunch information required. In order to sufficient individual bunch diagnostics requirements a development plan of the next generation DBPM processor with bunch-by-bunch capability has been initiated in SINAP since 2012. The whole development was divided into three steps: a concept processor based on digital oscilloscope IOC, an algorithm prototype processor based on commercial high speed ADC board, and a custom designed dedicated processor. The progress of this work and several preliminary beam experiments will be discussed in this paper.
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MOPTY038	NSLS-II Digital RF Controller Logic and Applications	cavity, EPICS, feedback, controls	1010
	B. Holub, F. Gao, J.G. Kulpin, C. Marques, J. Oliva, J. Rose, N.A. Towne BNL, Upton, New York, USA
	The National Synchrotron Light Source II accelerator consists of the Storage Ring, the Booster Ring, and Linac along with their associated cavities. NSLS II is committed to the use of digital RF controllers for controlling these cavities. Given the number, types and variety of functions of these cavities, we sought to limit the logic development effort by reuse of parameterized code on one hardware platform. Currently we have fielded six controllers in the NSLS II system. There are two controllers each in both the Storage ring and Booster. The first controller in each is used to control the cavity field and the second controller used for diagnostics. In the Linac a controller is provided which modulates the eGUN grid to generate the bunches. Lastly, in the Master Oscillator Distribution System a controller is used to make phase corrections to the outgoing master oscillator clock signal to account for thermal phase drifts along the distribution path.
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MOPTY039	Compact Single Pass BPM	software, controls, instrumentation, pick-up	1013
	M. Žnidarčič, M. Cargnelutti, E. Janezic I-Tech, Solkan, Slovenia
	Monitoring and subsequent optimization of linacs and beam transfers requires specific instrumentation for beam position data acquisition and processing. Compact single pass BPM is the newly developed prototype intended for position and charge monitoring in classical single-multi bunch operation linacs and transfer lines. Flexibility of the instrument enables the installation on electron and proton single pass machines. The motivation, processing principles and first results are presented.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPTY039
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MOPTY056	Elena Orbit and Schottky Measurement Systems	pick-up, antiproton, hardware, diagnostics	1061
	L. Søby, M.E. Angoletta, R. Marco-Hernandez, J.C. Molendijk, F. Pedersen, J. Sanchez-Quesada CERN, Geneva, Switzerland M. Bau University of Brescia, Brescia, Italy M. Ferrari, V. Ferrari Università di Brescia, Brescia, Italy
	A new Extra Low ENergy Antiproton ring (ELENA) is under construction at CERN to further decelerate the antiprotons from the existing Antiproton Decelerator (AD) to an energy of just 100 keV. This contribution will describe the beam position system foreseen for ELENA and how it can be adapted for Schottky measurements. The orbit system being developed is based on electrostatic shoebox BPMs fitted with Digital Down Converters (DDC). The main requirement is to measure complete orbits every 20 ms with a resolution of 0.1mm for intensities in the range of 1-3x10⁷ charges. The pick-up signals will, after amplification with a low noise charge amplifier, be down-mixed to baseband for position computation. In order to provide the longitudinal Schottky diagnostics of un-bunched beams, the 20 BPM sum signals will, after time off flight corrections, be added digitally to give an expected S/N increase of 13 dB compared to using a single electrostatic pick-up.
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MOPTY071	FPGA Based Global Orbit Feedback in the Taiwan Light Source	feedback, controls, interface, brilliance	1100
	C.H. Kuo, Y.-S. Cheng, P.C. Chiu, K.T. Hsu, K.H. Hu, D. Lee NSRRC, Hsinchu, Taiwan
	The global orbit feedback for the 1.5 GeV electron storage ring of TLS has been operated more than ten years. This system uses general processors to control feedback loop with 1 kHz rate. It is very important for various operation of storage ring now, but some hardware components could have been out of stock in the future. As a prototype, a FPGA based fast global orbit feedback at a 10 kHz data acquisition rate has been developed. A micro-TCA liked platform with FPGA board is used to implement control algorithm and acquire BPM data from Libera Brillance. The correction algorithm is written in VHDL and connected to power supply with AURORA digital links. The system architecture will be discussed in this report.
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MOPTY084	Design, Testing and Performance Results of a High-resolution, Broad-band, Low-latency Stripline Beam Position Monitor System	electron, operation, collider, laser	1136
	P. Burrows, D.R. Bett, N. Blaskovic Kraljevic, T. Bromwich, G.B. Christian, M.R. Davis, C. Perry JAI, Oxford, United Kingdom D.R. Bett CERN, Geneva, Switzerland
	A high-resolution, low-latency beam position monitor (BPM) system has been developed for use in particle accelerators and beamlines that operate with trains of particle bunches with bunch separations as low as several tens of nanoseconds, such as future linear electron-positron colliders and free-electron lasers. The system was tested with electron beams in the extraction line of the Accelerator Test Facility at the High Energy Accelerator Research Organization (KEK) in Japan. The fast analogue front-end signal processor is based on a single-stage RF down-mixer. The processor latency is 15.6 ± 0.1 ns. A position resolution below 300 nm has been demonstrated for beam intensities of around 1 nC, with single-pass beam.
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MOPWI013	Control System for the LCLS-II Undulator Prototype	controls, undulator, interface, monitoring	1173
	J.Z. Xu, R.I. Farnsworth, N.O. Strelnikov, I. Vasserman ANL, Argonne, Ilinois, USA
	Funding: Work supported by the U.S. Department of Energy, Office of Science, under Contract No. DE-AC02-06CH11357 The Linac Coherent Light Source (LCLS) has been successfully operated for more than 6 years. In order to expand the capability and capacity of the LCLS, LCLS-II has been planned and funded by the Department of Energy. The Advanced Photon Source (APS) at Argonne National Laboratory is tasked with building the prototype of the LCLS-II undulator based on the concept of magnetic force dynamic compensation. The control system for the prototype is responsible for four motion and feedback channels with sub-micron-level accuracy, eight load cells that monitor the forces that act on the system in real time, and multiple temperature sensors. A detailed description of the control system and its operation is reported.
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MOPWI037	Upgrade and Operation of the Demonstration 4 GS/Sec. Intra-Bunch Instability Control System for the SPS	feedback, kicker, controls, pick-up	1246
	J.E. Dusatko, J.D. Fox, C.H. Rivetta, O. Turgut SLAC, Menlo Park, California, USA W. Höfle CERN, Geneva, Switzerland
	Funding: Work supported by the U.S. Department of Energy under contract # DE-AC02-76SF00515 and the US LHC Accelerator Research Program (LARP). We present the expanded system implementation and operational experience details for the “Demo” technology platform commissioned at the SPS in January 2015. The system has been expanded during the LS1 shutdown with added features. The upgraded system has enhanced performance and more robust synchronization to the beam and accelerator timing system. Central to the new features are 1 GHz bandwidth kickers and RF amplifiers (including associated equalizers) which allow excitation and control of higher modes within the 2 ns bunch. We highlight the expanded features, and present their details.
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WEPHA041	ALGORITHM AND CIRCUIT TO IMPROVE ZERO-CROSSING STABILITY OF BIPOLAR TPS TRIM COIL POWER SUPPLY	controls, simulation, feedback, interface	3206
	B.S. Wang, Y.-C. Chien, P.C. Chiu, K.T. Hsu, C.Y. Liu, K.-B. Liu, Y.S. Wong, C.Y. Wu NSRRC, Hsinchu, Taiwan
	In TPS (Taiwan Photon Source) project, 58 home-built small form factor bipolar power supplies are used to fine-tune the trim coil of booster ring bending dipole magnets. With the preliminary analog PI control loop design version, current output will tend to behave with poor linearity around zero current. By employing DSP chip, a full digital PI control loop design together with optimal MOSFT switching algorithm and 13bits PWM output capability is capable of improving the output current performance around zero current. Before the final realization, MATLAB SIMULINK is utilized to find out the optimal MOSFT switching algorithm, and then physical circuit is implemented and tested. The result and design will be demonstrated in this paper to show significant improvement around zero current.
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WEPTY011	Power Supply Conceptual Design and R&D for the APS Upgrade	power-supply, interface, controls, network	3276
	J. Wang, B. Deriy, T. Fors, R.T. Keane, B. Song ANL, Argonne, Illinois, USA
	Funding: Work supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, under Contract No. DE-AC02-06CH11357. The MBA upgrade for the APS requires a large number of power supplies with either unipolar or bipolar DC output currents. The unipolar power supplies will be used to power the main coils in the dipole, quadrupole, and sextupole magnets and the bipolar power supplies will be used for the trim or correction coils. There are several demanding requirements of the power supplies. The unipolar power supplies are expected to have a current stability within 10 parts per million (ppm) of the full scale. The currents must be calibrated to the specification and confirmed with independent and accurate measurement. The bipolar power supplies for the fast correction magnets are required to have a wide output current bandwidth in order to minimize the impact on the real-time feedback system for the beam position correction. There are also new requirements for the power supply controls and communications that are much more demanding than that in the existing APS accelerators. This paper will report the conceptual designs of the power supply systems and the R&D program that is developed to find solutions to the technical challenges.
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Paper

Title

Other Keywords

Page

MOPHA012

A New FPGA Based Timing System at ELSA

timing, injection, booster, extraction

802

D. Proft, W. Hillert
ELSA, Bonn, Germany

At the electron stretcher facility ELSA a beam intensity upgrade from 20 mA to 200 mA is in progress. Investigations showed, that the maximum beam current is currently limited by excitation of beam instabilities. For separated characterization of single bunch instabilities from multi-bunch ones, a high beam current stored in a single revolving bunch is required. These high beam currents can only be achieved by accumulation of many shots from the injector. The existing timing system is not capable of single bunch injection and accumulation in the main stretcher ring. Therefore a new FPGA based timing system, synchronized to the RF system of the accelerator, has been developed which will completely supersede the existing one. Simultaneously the ‘‘slow'' timing system, providing trigger signals for the typically 6 s long accelerator cycle, is also modernized using a similar FPGA based solution to achieve a much better duty cycle during standard operation. In this contribution the FPGA designs laying the focus on the single bunch accumulation will be presented.

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MOPHA044

Testing a Digital Beam Position Stabilization for the P2-experiment at MESA

experiment, feedback, controls, electron

888

M. Dehn, K. Aulenbacher, J. Diefenbach, F. Fichtner, R. Herbertz, W. Klag
IKP, Mainz, Germany

Funding: Work supported by the German Federal Ministry of Education and Research (BMBF) and German Research Foundation (DFG) under the Collaborative Research Center 1044 and the Cluster of Excellence "PRISMA"
The Mainz Energy recovering Superconducting Accelerator (MESA) will be built at the institute for nuclear physics at Mainz University. Besides the multi-turn energy recovery mode an external beam mode is foreseen to provide 155 MeV electrons of 85% polarization at 150 μA for parity violating experiments. To achieve the required stability of the main beam parameters a dedicated digital position stabilization is currently developed and tested at the Mainz Microtron (MAMI).

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MOPTY008

Preliminary Hardware Implementation of Compensation Mechanism of Superconducting Cavity Failure in C-ADS Linac

hardware, linac, cavity, proton

953

Z. Xue, J.P. Dai
IHEP, Beijing, People's Republic of China
L. Cheng, Y. Yang
SINANO, Suzhou, People's Republic of China

For the proton linear accelerators used in applications such as ADS, due to the nature of the operation, it is essential to have beam failures at the rate several orders of magnitude lower than usual performance of similar accelerators. In order to achieve this extremely high performance reliability requirement, in addition to hardware improvement, a failure tolerant design is mandatory. A compensation mechanism to cope with hardware failure, mainly RF failures of superconducting cavities, will be in place in order to maintain the high uptime, short recovery time and extremely low frequency of beam loss. The hardware implementation of the mechanism poses high challenges due to the extremely tight timing constraints, high logic complexity, and mostly important, high flexibility and short turnaround time due to varying operation contexts. We will explore the hardware implementation of the scheme using fast electronic devices and Field Programmable Gate Array (FPGA). In order to achieve the goals of short recovery time and flexibility in compensation algorithms, an advanced hardware design methodology including high-level synthesis will be used.

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MOPTY012

Design and Test of Prototype of LLRF System for KIPT Neutron Source LINAC

LLRF, controls, linac, EPICS

959

X.P. Ma, Y.L. Chi, R.L. Liu
IHEP, Beijing, People's Republic of China
S. Shu
Institute of High Energy Physics (IHEP), Chinese Academy of Sciences, Beijing, People's Republic of China

A 100 MeV/100 kW electron LINAC is being constructed by IHEP, China for the NSC KIPT Neutron Source project in Ukraine. A LLRF system is required to produce the driver RF input of the klystron and maintain the accelerating phase and amplitude stability of the machine. The LLRF system consists of an RF reference distribution system, six identical control units, and the fast RF interlock module. The main part of control unit is the PXI-bus crate implemented with PXI9846 - 4 ADC digitizer board and ICS572 - high speed 2 ADC/2 DAC signal process board. An EPICS IOC based on WinDriver as the PCI device driver is developed and tested. Preliminary results show phase detect resolution of 0.03 degree (rms) of 2856 MHz signal has been achieved.
*Mail Address: maxp@ihep.ac.cn

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MOPTY020

An Intelligent Trigger Abnormal Beam Operation Monitoring Processor at the SSRF

monitoring, operation, injection, status

978

L.W. Lai, Z.C. Chen, Y.B. Leng, Y.B. Yan
SSRF, Shanghai, People's Republic of China

Funding: Work supported by National Nature Science Fundation of China(11305253)(11375255)(11105211)
An intelligent trigger abnormal beam operation monitoring processor has been designed at the SSRF. By applying digital signal processing algorithms in FPGA, the processor keeps monitoring the beam operation status. It will output a trigger signal and store the turn-by-turn beam position data when abnormal events detected. The abnormal events include injection, beam loss, and abnormal disturbance. This ability makes the processor a powerful tool for abnormal operation causes analysing and machine study.

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MOPTY022

Bunch by Bunch DBPM Processor Development and Preliminary Experiment in SSRF*

injection, hardware, betatron, experiment

984

Y.B. Leng, Z.C. Chen, L.W. Lai, Y.B. Yan, Y. Yang
SSRF, Shanghai, People's Republic of China

Funding: Work supported by Chinese NSFC11375255.
Digital BPM processor with turn-by-turn capability has been widely used in synchrotron radiation facilities over the world, which is proved to be very useful and powerful for daily operation and linear optics study but not good enough in the case of individual bunch information required. In order to sufficient individual bunch diagnostics requirements a development plan of the next generation DBPM processor with bunch-by-bunch capability has been initiated in SINAP since 2012. The whole development was divided into three steps: a concept processor based on digital oscilloscope IOC, an algorithm prototype processor based on commercial high speed ADC board, and a custom designed dedicated processor. The progress of this work and several preliminary beam experiments will be discussed in this paper.

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MOPTY038

NSLS-II Digital RF Controller Logic and Applications

cavity, EPICS, feedback, controls

1010

B. Holub, F. Gao, J.G. Kulpin, C. Marques, J. Oliva, J. Rose, N.A. Towne
BNL, Upton, New York, USA

The National Synchrotron Light Source II accelerator consists of the Storage Ring, the Booster Ring, and Linac along with their associated cavities. NSLS II is committed to the use of digital RF controllers for controlling these cavities. Given the number, types and variety of functions of these cavities, we sought to limit the logic development effort by reuse of parameterized code on one hardware platform. Currently we have fielded six controllers in the NSLS II system. There are two controllers each in both the Storage ring and Booster. The first controller in each is used to control the cavity field and the second controller used for diagnostics. In the Linac a controller is provided which modulates the eGUN grid to generate the bunches. Lastly, in the Master Oscillator Distribution System a controller is used to make phase corrections to the outgoing master oscillator clock signal to account for thermal phase drifts along the distribution path.

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MOPTY039

Compact Single Pass BPM

software, controls, instrumentation, pick-up

1013

M. Žnidarčič, M. Cargnelutti, E. Janezic
I-Tech, Solkan, Slovenia

Monitoring and subsequent optimization of linacs and beam transfers requires specific instrumentation for beam position data acquisition and processing. Compact single pass BPM is the newly developed prototype intended for position and charge monitoring in classical single-multi bunch operation linacs and transfer lines. Flexibility of the instrument enables the installation on electron and proton single pass machines. The motivation, processing principles and first results are presented.

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MOPTY056

Elena Orbit and Schottky Measurement Systems

pick-up, antiproton, hardware, diagnostics

1061

L. Søby, M.E. Angoletta, R. Marco-Hernandez, J.C. Molendijk, F. Pedersen, J. Sanchez-Quesada
CERN, Geneva, Switzerland
M. Bau
University of Brescia, Brescia, Italy
M. Ferrari, V. Ferrari
Università di Brescia, Brescia, Italy

A new Extra Low ENergy Antiproton ring (ELENA) is under construction at CERN to further decelerate the antiprotons from the existing Antiproton Decelerator (AD) to an energy of just 100 keV. This contribution will describe the beam position system foreseen for ELENA and how it can be adapted for Schottky measurements. The orbit system being developed is based on electrostatic shoebox BPMs fitted with Digital Down Converters (DDC). The main requirement is to measure complete orbits every 20 ms with a resolution of 0.1mm for intensities in the range of 1-3x10⁷ charges. The pick-up signals will, after amplification with a low noise charge amplifier, be down-mixed to baseband for position computation. In order to provide the longitudinal Schottky diagnostics of un-bunched beams, the 20 BPM sum signals will, after time off flight corrections, be added digitally to give an expected S/N increase of 13 dB compared to using a single electrostatic pick-up.

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MOPTY071

FPGA Based Global Orbit Feedback in the Taiwan Light Source

feedback, controls, interface, brilliance

1100

C.H. Kuo, Y.-S. Cheng, P.C. Chiu, K.T. Hsu, K.H. Hu, D. Lee
NSRRC, Hsinchu, Taiwan

The global orbit feedback for the 1.5 GeV electron storage ring of TLS has been operated more than ten years. This system uses general processors to control feedback loop with 1 kHz rate. It is very important for various operation of storage ring now, but some hardware components could have been out of stock in the future. As a prototype, a FPGA based fast global orbit feedback at a 10 kHz data acquisition rate has been developed. A micro-TCA liked platform with FPGA board is used to implement control algorithm and acquire BPM data from Libera Brillance. The correction algorithm is written in VHDL and connected to power supply with AURORA digital links. The system architecture will be discussed in this report.

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reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPTY071

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MOPTY084

Design, Testing and Performance Results of a High-resolution, Broad-band, Low-latency Stripline Beam Position Monitor System

electron, operation, collider, laser

1136

P. Burrows, D.R. Bett, N. Blaskovic Kraljevic, T. Bromwich, G.B. Christian, M.R. Davis, C. Perry
JAI, Oxford, United Kingdom
D.R. Bett
CERN, Geneva, Switzerland

A high-resolution, low-latency beam position monitor (BPM) system has been developed for use in particle accelerators and beamlines that operate with trains of particle bunches with bunch separations as low as several tens of nanoseconds, such as future linear electron-positron colliders and free-electron lasers. The system was tested with electron beams in the extraction line of the Accelerator Test Facility at the High Energy Accelerator Research Organization (KEK) in Japan. The fast analogue front-end signal processor is based on a single-stage RF down-mixer. The processor latency is 15.6 ± 0.1 ns. A position resolution below 300 nm has been demonstrated for beam intensities of around 1 nC, with single-pass beam.

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reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPTY084

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MOPWI013

Control System for the LCLS-II Undulator Prototype

controls, undulator, interface, monitoring

1173

J.Z. Xu, R.I. Farnsworth, N.O. Strelnikov, I. Vasserman
ANL, Argonne, Ilinois, USA

Funding: Work supported by the U.S. Department of Energy, Office of Science, under Contract No. DE-AC02-06CH11357
The Linac Coherent Light Source (LCLS) has been successfully operated for more than 6 years. In order to expand the capability and capacity of the LCLS, LCLS-II has been planned and funded by the Department of Energy. The Advanced Photon Source (APS) at Argonne National Laboratory is tasked with building the prototype of the LCLS-II undulator based on the concept of magnetic force dynamic compensation. The control system for the prototype is responsible for four motion and feedback channels with sub-micron-level accuracy, eight load cells that monitor the forces that act on the system in real time, and multiple temperature sensors. A detailed description of the control system and its operation is reported.

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reference for this paper ※ https://doi.org/10.18429/JACoW-IPAC2015-MOPWI013

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MOPWI037

Upgrade and Operation of the Demonstration 4 GS/Sec. Intra-Bunch Instability Control System for the SPS

feedback, kicker, controls, pick-up

1246

J.E. Dusatko, J.D. Fox, C.H. Rivetta, O. Turgut
SLAC, Menlo Park, California, USA
W. Höfle
CERN, Geneva, Switzerland

Funding: Work supported by the U.S. Department of Energy under contract # DE-AC02-76SF00515 and the US LHC Accelerator Research Program (LARP).
We present the expanded system implementation and operational experience details for the “Demo” technology platform commissioned at the SPS in January 2015. The system has been expanded during the LS1 shutdown with added features. The upgraded system has enhanced performance and more robust synchronization to the beam and accelerator timing system. Central to the new features are 1 GHz bandwidth kickers and RF amplifiers (including associated equalizers) which allow excitation and control of higher modes within the 2 ns bunch. We highlight the expanded features, and present their details.

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WEPHA041

ALGORITHM AND CIRCUIT TO IMPROVE ZERO-CROSSING STABILITY OF BIPOLAR TPS TRIM COIL POWER SUPPLY

controls, simulation, feedback, interface

3206

B.S. Wang, Y.-C. Chien, P.C. Chiu, K.T. Hsu, C.Y. Liu, K.-B. Liu, Y.S. Wong, C.Y. Wu
NSRRC, Hsinchu, Taiwan

In TPS (Taiwan Photon Source) project, 58 home-built small form factor bipolar power supplies are used to fine-tune the trim coil of booster ring bending dipole magnets. With the preliminary analog PI control loop design version, current output will tend to behave with poor linearity around zero current. By employing DSP chip, a full digital PI control loop design together with optimal MOSFT switching algorithm and 13bits PWM output capability is capable of improving the output current performance around zero current. Before the final realization, MATLAB SIMULINK is utilized to find out the optimal MOSFT switching algorithm, and then physical circuit is implemented and tested. The result and design will be demonstrated in this paper to show significant improvement around zero current.

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WEPTY011

Power Supply Conceptual Design and R&D for the APS Upgrade

power-supply, interface, controls, network

3276

J. Wang, B. Deriy, T. Fors, R.T. Keane, B. Song
ANL, Argonne, Illinois, USA

Funding: Work supported by the U.S. Department of Energy, Office of Science, Office of Basic Energy Sciences, under Contract No. DE-AC02-06CH11357.
The MBA upgrade for the APS requires a large number of power supplies with either unipolar or bipolar DC output currents. The unipolar power supplies will be used to power the main coils in the dipole, quadrupole, and sextupole magnets and the bipolar power supplies will be used for the trim or correction coils. There are several demanding requirements of the power supplies. The unipolar power supplies are expected to have a current stability within 10 parts per million (ppm) of the full scale. The currents must be calibrated to the specification and confirmed with independent and accurate measurement. The bipolar power supplies for the fast correction magnets are required to have a wide output current bandwidth in order to minimize the impact on the real-time feedback system for the beam position correction. There are also new requirements for the power supply controls and communications that are much more demanding than that in the existing APS accelerators. This paper will report the conceptual designs of the power supply systems and the R&D program that is developed to find solutions to the technical challenges.

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