Keyword: FPGA
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MOPO041 Performance Test Results of Magnet Power Supply controls, interface, power-supply, experiment 118
 
  • K.-H. Park, J.H. Han, S.-H. Jeong, Y.G. Jung, D.E. Kim, M.J. Kim, H.-G. Lee, S.B. Lee, B.G. Oh, H.S. Suh
    PAL, Pohang, Kyungbuk, Republic of Korea
 
  A high stable magnet power supply (MPS) was developed, which was a bipolar type with 200A of the output current at the 40V of output voltage. The MPS has been implemented by the digital signal processing technology using the DSP, FPGA, ADCs and so on. The output current stability of the MPS showed about 6ppm peak-to-peak in a short term experiment at 200A of its full output current. The long term stability was shown in 15 ppm peak-to-peak for 10 hours at 200A. And the others experimental results about the MPS were shown in this paper.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-MOPO041  
About • paper received ※ 31 August 2018       paper accepted ※ 19 September 2018       issue date ※ 18 January 2019  
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MOPO107 Performance Evaluation of the RF Reference Phase Stabilization System on Fiber-optical Link for KEK e/e+ Injector LINAC feedback, linac, controls, EPICS 230
 
  • N. Liu, B. Du
    Sokendai - Hayama, Hayama, Japan
  • D.A. Arakawa, H. Katagiri, T. Matsumoto, S. Michizono, T. Miura, F. Qiu, Y. Yano
    KEK, Ibaraki, Japan
  • T. Matsumoto, T. Miura, F. Qiu
    Sokendai, Ibaraki, Japan
 
  KEK e/e+ injector is the 600 m J-shaped LINAC which has 8 RF sectors. Stabilization of RF phase reference for long distance transmission is necessary for stable RF operation. In the present system, single-mode fiber-optical links without feedback control are used from sector 2 to 5. For the SuperKEKB, the phase stability requirement is within 0.1 deg. rms. The more stable RF phase reference is necessary to improve the phase stability. In this paper, a feedback control system for RF reference phase stabilization is tested for system performance evaluation. The temperature and humidity characteristics of the electric and optical components and phase stabilized optical fiber (PSOF) with different wavelengths will also be presented.  
poster icon Poster MOPO107 [2.026 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-MOPO107  
About • paper received ※ 12 September 2018       paper accepted ※ 21 September 2018       issue date ※ 18 January 2019  
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MOPO111 Development of New LLRF System at the J-PARC Linac LLRF, linac, low-level-rf, feedback 233
 
  • K. Futatsukawa, Z. Fang, Y. Fukui
    KEK, Ibaraki, Japan
  • Y. Sato
    Nippon Advanced Technology Co., Ltd., Tokai, Japan
  • S. Shinozaki
    JAEA/J-PARC, Tokai-mura, Japan
 
  In the J-PARC linac, the LLRF system with the digital feedback (DFB) and the digital feedforward (DFF) was adopted for satisfying requirement of amplitude and phase stabilities. It has been operated without serious problems. However, it has been used since the beginning of the J-PARC and more than ten years have already passed since the development. The increase of the failure frequency for this system is expected. Additionally, it is difficult to maintain it for some discontinued boards of DFB and DFF and the older developing environment of software. Therefore, we are starting to study the new LLRF system of the next generation. In the present, we are exploring several possibilities of a new way and investigating each advantage and disadvantage. The project and the status of the development for the new system in the J-PARC linac LLRF are introduced.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-MOPO111  
About • paper received ※ 22 September 2018       paper accepted ※ 09 November 2018       issue date ※ 18 January 2019  
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MOPO115 CEBAF Photo Gun RF System operation, laser, gun, LLRF 236
 
  • T. E. Plawski, R. Bachimanchi, M. Diaz, H. Higgins, C. Hovater, C.I. Mounts, D.J. Seidman
    JLab, Newport News, Virgina, USA
 
  Funding: Authored by JSA, LLC under U.S. DOE Contract DE-AC05- 06OR23177 and DE-SC0005264.
During the CEBAF 12 GeV Upgrade at Jefferson Lab, a fourth experimental hall, ’D’, was added to the existing three halls. To produce four beams and deliver them to all halls concurrently requires new frequencies and a new timing pattern of the electron bunches. Since a photo-gun is used to produce electron bunches, the gun’s drive laser pulses need to be synchronized with the required bunch rate frequencies of 499 MHz or 249.5 MHz. To meet these new operational requirements, the new LLRF system has been proposed. Very specific requirements (dual frequency operation) on one side and the simple RF drive mode operation on the other imply the use of a commercial off-the-shelf digital platform rather than a system typical for RF cavity field control. We have chosen the Texas Instruments FPGA board along with a high-speed 8-Channel, 14-Bit board, and a 4-Channel, 16-Bit board. The DAC board includes the clock generator for clocking ADCs, DACs and the FPGA. The complete Gun Laser LLRF system has been designed, built, and recently commissioned in the CEBAF Injector. This paper will detail the design and report on commissioning activities.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-MOPO115  
About • paper received ※ 12 September 2018       paper accepted ※ 20 September 2018       issue date ※ 18 January 2019  
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TUPO007 FRIB Fast Machine Protection System: Chopper Monitor System Design controls, machine-protect, high-voltage, power-supply 336
 
  • Z. Li, D. Chabot, S. Cogan, S.M. Lidia, R.C. Webber
    FRIB, East Lansing, USA
 
  Funding: Work supported by Work supported by the U.S. Department of Energy Office of Science under Cooperative Agreement DE-SC0000661.
The Facility for Rare Isotope Beams tunes the beam power from 0 to 400KW by chopping the beam current with a beam chopper in the Low Energy Beam Transport. A chopper monitoring system is employed to verify proper chopper operation to avoid delivery of undesired high-powered beam and to inhibit beam for machine protection purposes. The system monitors the incoming beam gate time structure, the chopper switch high voltage pulses, the chopper electrode charge/discharge currents, and the status of machine protection system. It is designed to switch off the beam within tens of nanoseconds of a detected fault. Chal-lenges include a dynamic beam gate pulse structure with pulse lengths as short as 0.6 µs and high voltage power supply current pulses of ~25 ns. A high speed "integrate and hold circuit with reset", Field Program-mable Gate Array based digital control circuit and high speed ADC circuit were developed to fulfil the re-quired functions. Design approach, simulation, and test results with the beam are the focus of this paper.
 
slides icon Slides TUPO007 [1.082 MB]  
poster icon Poster TUPO007 [1.321 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-TUPO007  
About • paper received ※ 12 September 2018       paper accepted ※ 19 September 2018       issue date ※ 18 January 2019  
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TUPO132 Implementation of the Beam Loading Compensation Algorithm in the LLRF System of the European XFEL LLRF, controls, cavity, FEL 594
 
  • Ł. Butkowski, J. Branlard, M. Omet, R. Rybaniec, H. Schlarb, Ch. Schmidt
    DESY, Hamburg, Germany
 
  In the European XFEL, a maximum number of 2700 electron bunches per RF pulse with beam currents up to 4.5mA can be accelerated. Such large beam currents can cause a significant drop of the accelerating gradients, which results in large energy changes across the macro-pulse. But, the electron bunch energies should not deviate from the nominal energy to guarantee stable and reproducible generation of photon pulses for the European XFEL users. To overcome this issue, the Low Level RF system (LLRF) compensates in real-time the beam perturbation using a Beam Loading Compensation algorithm (BLC) minimizing the transient gradient variations. The algorithm takes the charge information obtained from beam diagnostic systems e.g. Beam Position Monitors (BPM) and information from the timing system. The BLC is a part of the LLRF controller implemented in the FPGA. The article presents the implementation of the algorithm in the FPGA and shows the results achieved with the BLC in the European XFEL.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-LINAC2018-TUPO132  
About • paper received ※ 11 September 2018       paper accepted ※ 20 September 2018       issue date ※ 18 January 2019  
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