Paper |
Title |
Page |
TUB003 |
Event-Synchronized Data-Acquisition System for SPring-8 XFEL
|
69 |
|
- M. Yamaga, Y. Furukawa, T. Hirono, M. I. Ishii, T. Masuda, T. Ohata, R. Tanaka, A. Yamashita
JASRI/SPring-8, Hyogo-ken
- T. Fukui, N. Hosoda
RIKEN/SPring-8, Hyogo
|
|
|
We report the status and the upgrade of the event-synchronized data-acquisition system for the accelerator control of XFEL/SPring-8. Because the XFEL is composed of a linac, most of the equipment is driven with the pulsed operation. The stability of equipment is critically important to achieve/stabilize the FEL lasing. We need a fast data-acquisition system to take a set of data from RF signals and beam monitor signals synchronizing with the same electron beam shots. For this purpose, the event-synchronized data-acquisition system has been introduced to the control system of the SCSS test accelerator, an XFEL prototype machine. The system consists of a data filling computer, a relational data base server, VME-based shared memory boards and distributed shared memory network. So far total of 54 signals from the beam monitoring system are successfully collected synchronizing with the 60 Hz of beam operation cycles. The accumulated data was utilized for the fast feedback correction of beam trajectories and energy quite effectively. Signals from the RF systems will be taken by the upgraded data-acquisition system utilizing the distributed memory-cache system.
|
|
TUP061 |
Applications and Upgrading of Flexible and Logic-reconfigurable VME Board
|
221 |
|
- T. Hirono, T. Kudo, T. Ohata
JASRI/SPring-8, Hyogo-ken
|
|
|
We applied the flexible and logic-reconfigurable VME boards to many control systems, which requires fast and real-time control, such as a tag generating system and a pulse motor controller of 60Hz beam shutter. The board has a field programmable gate arrays (FPGA) chip for execution of user logic, which can be implemented in C. IO interfaces of the board are module cards. They can be mounted on the base board with connectors. The board was easily modified by exchanging the IO modules and reconfiguring FPGA logic. We also upgraded the base board. The new board supports large data transition. The new board has PMC sockets with a PCI bus and a Gigabit Ether port. The same IO module card can also be used on the new board. and the upgraded board are shown in the presentation. The design and implementation of developing-evironment of the user logic of the board are shown with the applications. We also discuss about the design of the upgraded board.
|
|
|
Poster
|
|
WEP017 |
Design of an XFEL Beamline DAQ System
|
438 |
|
- T. Ohata, Y. Furukawa, T. Hirono, R. Tanaka, A. Yamashita
JASRI/SPring-8, Hyogo-ken
- T. Hatsui, T. Ishikawa, M. Yabashi
RIKEN/SPring-8, Hyogo
|
|
|
We have designed the control and the data acquisition system for the SPring-8 XFEL beamlines. The XFEL generates ultra-short pulsed coherent X-ray laser with the 60Hz beam repetition rate. Two-dimensional x-ray detectors are under development for X-ray detection. The data acquisition system for the detectors has to synchronize with the accelerator beam operation cycle to obtain correlations between incident X-ray and experimental data. The tagging system that records event numbers in the measurement data is especially important. The key technologies to make a success of the DAQ system of XFEL beamline are a tagging system of the 60Hz X-ray pulse, a real-time compression of fast massive data and low-latency network for data transfer. Both the network system of 3~4 Gbps bandwidth and the storage system with a near petabyte will be required in the initial operation phase of the XFEL project. At first, we developed a FPGA based tagging board that delivers tag numbers of X-ray pulse shots with parallel and serial interfaces. A first test system will be assembled by early 2010.
|
|