Author: Höfle, W.
Paper Title Page
WE1AB1 The SPS Wideband Feedback Processor: A Flexible FPGA-Based Digital Signal Processing Demonstration Platform for Intra-Bunch Beam Stability Studies 309
 
  • J.E. Dusatko, J.D. Fox, C.H. Rivetta
    SLAC, Menlo Park, California, USA
  • E.R. Bjørsvik, W. Höfle
    CERN, Geneva, Switzerland
  • O. Turgut
    Stanford University, Stanford, California, USA
 
  Funding: US DOE Contract #DE-AC02-76SF00515, the US LHC Accelerator Research Program (LARP), the CERN LHC Injector Upgrade Project (LIU) and the US-Japan Cooperative Program in HEP.
A flexible digital signal processing platform based on FPGA technology has been developed for vertical intra-bunch beam stability studies at the CERN SPS. This system is unique in that samples at a very high rate (4GSa/s) in order to measure and control motion within the 1.7ns proton beam bunch. The core of the system is an FPGA-based digital signal processor. Being programmable, it enables fast development of control algorithms. The processor, together with its supporting components forms a complete platform for demonstration studies of beam instability measurement and control. This system is capable of operation as either a stand-alone arbitrary waveform generator for driven mode instability studies, a closed-loop feedback control system for stability control and as a diagnostic instrument for measurement of beam motion. Recent measurements have shown the system is effective at damping single-bunch and bunch train intra-bunch instabilities with growth times of 200 turns. This paper summarizes the system design, provides some operational highlights, describes the upgrades performed to date and concludes with a description of the next generation processor now in development.
 
slides icon Slides WE1AB1 [2.409 MB]  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IBIC2017-WE1AB1  
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