PCaPAC2022 - List of Authors (Dziewiecki, M.)

Paper	Title	Page
THP05	Integration of Quench Detection Solution into FAIR’s FESA Control System	59
	M. Marn, A. Debenjak COSYLAB, Control System Laboratory, Ljubljana, Slovenia M. Dziewiecki GSI, Darmstadt, Germany
	Facility for Antiproton and Ion Research (FAIR) is going to make wide use of superconducting magnets for its components: the SIS100 synchrotron, the Superconducting Fragment Separator (SFRS) and Atomic, Plasma Physics and Applications (APPA) experiments. For all these magnets, uniform quench detection (QuD) electronics have been developed to protect them in case of uncontrolled loss of superconductivity. The QuD system will contain ca. 1500 electronic units, each having an Ethernet interface for controls, monitoring, data acquisition, and time synchronization. The units will be grouped into sub-networks of ca. 100 units and interfaced via dedicated control computers to the accelerator network. The interfacing software used to expose QuD functions to the FAIR controls framework is implemented as a Front-End Software Architecture (FESA) class. The software provides a solution for the constant collection of the data and monitoring of the system, storing the complete snapshot in the case a quench event is detected, and prompt notification of a quench to other components of the FAIR facility. The software is developed with special attention to robustness and reliability.
DOI •	reference for this paper ※ doi:10.18429/JACoW-PCaPAC2022-THP05
About •	Received ※ 26 September 2022 — Revised ※ 07 February 2023 — Accepted ※ 17 February 2023 — Issue date ※ 18 February 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP15	Next Generation GSI/FAIR Scalable Control Unit: Lessons Learned from 10 Years in the Field	76
	K. Lüghausen, M. Dziewiecki, K. Kaiser, G.M. May, S. Rauch, M. Thieme GSI, Darmstadt, Germany
	The end-of-life of many components brought the need for a redesign of our main Control System Front-End - the SCU (Scaleable Control Unit). It was a chance to make improvements and use more powerful state-of-the-art core components. This included a new Arria 10 FPGA and a completely redesigned housekeeping circuit based on an AVR microcontroller. Further, the project was cleaned by removing unused components and features. Main frame conditions stay fixed for backward compatibility, like the mechanical form factor or the 16-bit parallel bus. Majority of gateware and firmware could be reused and just some adaptations for the new FPGA were needed. Nevertheless, providing continuous compatibility with legacy peripherals needed a substantial effort.
	Poster THP15 [27.393 MB]
DOI •	reference for this paper ※ doi:10.18429/JACoW-PCaPAC2022-THP15
About •	Received ※ 30 September 2022 — Revised ※ 06 October 2022 — Accepted ※ 01 February 2023 — Issue date ※ 18 February 2023
Cite •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

Integration of Quench Detection Solution into FAIR’s FESA Control System

59

M. Marn, A. Debenjak
COSYLAB, Control System Laboratory, Ljubljana, Slovenia
M. Dziewiecki
GSI, Darmstadt, Germany

Facility for Antiproton and Ion Research (FAIR) is going to make wide use of superconducting magnets for its components: the SIS100 synchrotron, the Superconducting Fragment Separator (SFRS) and Atomic, Plasma Physics and Applications (APPA) experiments. For all these magnets, uniform quench detection (QuD) electronics have been developed to protect them in case of uncontrolled loss of superconductivity. The QuD system will contain ca. 1500 electronic units, each having an Ethernet interface for controls, monitoring, data acquisition, and time synchronization. The units will be grouped into sub-networks of ca. 100 units and interfaced via dedicated control computers to the accelerator network. The interfacing software used to expose QuD functions to the FAIR controls framework is implemented as a Front-End Software Architecture (FESA) class. The software provides a solution for the constant collection of the data and monitoring of the system, storing the complete snapshot in the case a quench event is detected, and prompt notification of a quench to other components of the FAIR facility. The software is developed with special attention to robustness and reliability.

DOI •

reference for this paper ※ doi:10.18429/JACoW-PCaPAC2022-THP05

About •

Received ※ 26 September 2022 — Revised ※ 07 February 2023 — Accepted ※ 17 February 2023 — Issue date ※ 18 February 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THP15

Next Generation GSI/FAIR Scalable Control Unit: Lessons Learned from 10 Years in the Field

76

K. Lüghausen, M. Dziewiecki, K. Kaiser, G.M. May, S. Rauch, M. Thieme
GSI, Darmstadt, Germany

The end-of-life of many components brought the need for a redesign of our main Control System Front-End - the SCU (Scaleable Control Unit). It was a chance to make improvements and use more powerful state-of-the-art core components. This included a new Arria 10 FPGA and a completely redesigned housekeeping circuit based on an AVR microcontroller. Further, the project was cleaned by removing unused components and features. Main frame conditions stay fixed for backward compatibility, like the mechanical form factor or the 16-bit parallel bus. Majority of gateware and firmware could be reused and just some adaptations for the new FPGA were needed. Nevertheless, providing continuous compatibility with legacy peripherals needed a substantial effort.

Poster THP15 [27.393 MB]

DOI •

reference for this paper ※ doi:10.18429/JACoW-PCaPAC2022-THP15

About •

Received ※ 30 September 2022 — Revised ※ 06 October 2022 — Accepted ※ 01 February 2023 — Issue date ※ 18 February 2023

Cite •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)