Author: Lill, R.M.
Paper Title Page
TUPCF03 The RF BPM Pickup Electrodes Design for the APS-MBA Upgrade 199
 
  • X. Sun, R.M. Lill, B.K. Stillwell
    ANL, Argonne, Illinois, USA
 
  Funding: Work supported by the U.S. Department of Energy, Office of Science, under Contract No. DE-AC02-06CH11357.
The Advanced Photon Source (APS) is currently in the preliminary design phase for a multi-bend achromat (MBA) lattice upgrade. Beam stability is critical for the MBA and will require roughly 570 rf beam position moni-tors (BPMs) to provide the primary measurement of the electron beam trajectory through the insertion device (ID) straight sections and in the storage ring arcs. The BPM assembly features 8 mm diameter pickup electrodes that are welded to a stainless steel chamber and integrated shielded bellows both upstream and downstream of the chamber to decouple the BPM electrodes from mechani-cal motion of adjacent chambers. The design, simula-tions, and prototype test results will be presented.
 
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IBIC2017-TUPCF03  
Export • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)  
 
TUPCF04 Feedback Controller Development for the APS-MBA Upgrade 203
 
  • H. Bui, N.D. Arnold, A.R. Brill, J. Carwardine, G. Decker, T. Fors, R.M. Lill, D.R. Paskvan, A.F. Pietryla, N. Sereno, S.E. Shoaf, S. Veseli, S. Xu
    ANL, Argonne, Illinois, USA
 
  The Advanced Photon Source (APS) is currently in the preliminary design phase for the multi-bend achromat (MBA) lattice upgrade. Broadband Root Mean Square (rms) orbit motion should stay within 10% of a beam cross-section of the order 4μm x 4μm rms at the insertion device source-points. In order to meet these stringent AC beam stability requirements, a new orbit feedback system is under development and is being tested on the existing APS storage ring. The controller prototype uses Commercial Off-The-Shelf (COTS) hardware that has both high-performance Xilinx Field-Programmable Gate Array (FPGA) and two high-performance Texas-Instruments Digital Signal Processors (DSP) onboard. In this paper, we will discuss the rationale for a combined DSP/FPGA architecture and how functions are allocated. We then present the FPGA architecture and the results of using Infinite Impulse Response (IIR) filtering to mitigate Beam Position Monitor (BPM) switching noise and aliasing.  
DOI • reference for this paper ※ https://doi.org/10.18429/JACoW-IBIC2017-TUPCF04  
Export • reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)