CERN, Geneva
The diamond beam monitor is a solid-state ionization chamber that stands out due to its fast and efficient charge collection and its high radiation tolerance. The diamond technology gives a charge collection time of less than 1 ns and lifetime studies made at CERN with 24 GeV protons showed a decrease in performance of only 50% at 10 MGy, which make this device particularly well adapted to applications in particle accelerators. A poly-crystalline CVD diamond beam monitor has been evaluated as a beam halo loss monitor for the CERN LHC accelerator. Despite the read-out being made through 250 m of cable, the tests showed a good signal-to-noise ratio of 6.8, an excellent double-pulse resolution of less than 5 ns and a high dynamic range basically unlimited except by the electronics. A single-crystalline CVD diamond beam monitor was built and tested in cooperation with Bergoz Instrumentation for ISOLDE at CERN for the HIE-REX upgrade. This device was used to measure the beam intensity for particle counting and for measuring the beam energy spectrum. An energy resolution of 0.6% and a time resolution of 39 ps were measured for a carbon ion energy of 22.8 MeV.
CERN, Geneva
The LHC Beam Loss Monitoring (BLM) system is one of the most complex instrumentation systems deployed in the LHC. In addition to protecting the collider, the system also needs to provide a means of diagnosing machine faults and deliver feedback of losses to the control room as well as to several systems for their setup and analysis. It has to transmit and process signals from over 4,000 monitors, and has nearly 3 million configurable parameters. In a system of such complexity, firmware reliability is a critical issue. The integrity of the signal chain of the LHC BLM system and its ability to correctly detect unwanted scenarios and thus provide the required protection level must be ensured. In order to analyze the reliability and functionality, a test bench has been developed that emulates different types of loss signals and monitors the performance and response of the FPGA-based data analysis firmware. This paper will report on the numerous tests that have been performed and on how the results are used to quantify the reliability of the system.