Paper |
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WEPMN028 |
Development of Digital Low-level RF Control System using Multi-intermediate Frequencies
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2110 |
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- T. Matsumoto
- S. Fukuda, H. Katagiri, S. Michizono, Y. Yano
KEK, Ibaraki
- Z. Geng
IHEP Beijing, Beijing
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Digital low level rf (LLRF) control system has been developed in Superconducting RF Test Facility (STF) at KEK to carry out the accelerating electric field stability of 0.3% (rms) in amplitude and 0.3 degree (rms) in phase, respectively. In the digital LLRF system, rf probe signal from cavity is down-converted to intermediate frequency (IF) for acquisition at analog-to-digital converter (ADC) and the number of ADCs required is equal to the number of cavities. In order to decrease the number of ADCs, a new digital LLRF control system is under development. In this LLRF system, rf signals are down-converted to different IF and combined. The combined signal is detected with one ADC and I/Q components of each rf signal are calculated with digital signal processing. This paper describes a result of simulation and estimation using cavity simulator based on FPGA board about this new technique.
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WEPMN029 |
Status of the Low-Level RF System at KEK-STF
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2113 |
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- S. Michizono
- S. Fukuda, H. Katagiri, T. Matsumoto, T. Miura, Y. Yano
KEK, Ibaraki
- Z. Geng
IHEP Beijing, Beijing
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RF field stabilities of less than 0.3%, 0.3deg. are required at STF llrf system. In order to satisfy these requirements, digital FB system using a FPGA is adopted. The FB system consists of a FPGA (VirtexIIPro30) with ten 16-bit ADCs and two 14-bit DACs. The rf (1.3 GHz) probe signals are downconverted to the IF (10 MHz) and directly acquired at ADCs. Total 8 cavities will be installed at STF-Phase 1 in 2007 and vector sum control of 8 cavity signals will be carried out. The performance of the FB system is examined with electric cavity simulators prior to the rf operation.
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