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TY - CONF AU - Echevarria, P. AU - Aldekoa, E. AU - Jugo, J. AU - Knobloch, J. AU - Neumann, A. AU - Ushakov, A. ED - Koscielniak, Shane ED - Satogata, Todd ED - Schaa, Volker RW ED - Thomson, Jana TI - SRF Cavity Simulator for LLRF Algorithms Debugging J2 - Proc. of IPAC2018, Vancouver, BC, Canada, April 29-May 4, 2018 C1 - Vancouver, BC, Canada T2 - International Particle Accelerator Conference T3 - 9 LA - english AB - The availability of niobium superconducting cavities, ei-ther due to a lack of a real cavity or due to the time needed for the experiment set up (vacuum, cryogenics, cabling, etc.), is limited, and thus it can block or delay the develop-ment of new algorithms such as low level RF control. Hardware-in-the-loop simulations, where an actual cavity is replaced by an electronics system, can help to solve this issue. In this paper we present a Cavity Simulator imple-mented in a National Instruments PXI equipped with an FPGA module. This module operates with one intermedi-ate frequency input which is IQ-demodulated and fed to the electrical cavity's model, where the transmitted and re-flected voltages are calculated and IQ-modulated to gener-ate two intermediate frequency outputs. Some more ad-vanced features such as mechanical vibration modes driven by Lorentz-force detuning or external microphonics have also been implemented. This Cavity Simulator is planned to be connected to an mTCA chassis to close the loop with a LLRF control system. PB - JACoW Publishing CP - Geneva, Switzerland SP - 2118 EP - 2120 KW - cavity KW - controls KW - SRF KW - LLRF KW - FPGA DA - 2018/06 PY - 2018 SN - 978-3-95450-184-7 DO - 10.18429/JACoW-IPAC2018-WEPAK013 UR - http://jacow.org/ipac2018/papers/wepak013.pdf ER -