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RIS citation export for THPAK106: 400 MHz Frequency/phase Detector and Counter

TY - CONF
AU - Fu, X.L.
AU - Dennison, G.
AU - Fong, K.
AU - Ji, B.
AU - Laverty, M.P.
AU - Yin, Z.G.
AU - Zhang, T.J.
AU - Zheng, Q.
ED - Koscielniak, Shane
ED - Satogata, Todd
ED - Schaa, Volker RW
ED - Thomson, Jana
TI - 400 MHz Frequency/phase Detector and Counter
J2 - Proc. of IPAC2018, Vancouver, BC, Canada, April 29-May 4, 2018
C1 - Vancouver, BC, Canada
T2 - International Particle Accelerator Conference
T3 - 9
LA - english
AB - To enhance the performance and precision of TRIUMF Low Level RF system, a frequency/phase detector and counter based on FPGA is developed. The frequency/phase detector and counter is designed as a daughter board of the low level RF control system, and is connected to the mother board with mixed signal connectors. It sends the frequency error data to the PC though VXI databus, and provides two analog phase errors outputs. In current design, one single unit supports four channel discriminations of RF frequencies/phases. Preliminary tests show that the reported phase detector has a bandwidth of 400MHz. A unique implementation of frequency discrimination was carefully carried out to ensure the resolution can reach as high as 1Hz. The phase-frequency detector has been successfully applied to the Accelerator Cryo Module (ACM) system and the requirement of the low level RF control system is satisfied. After a long-term running test, the stability and reliability of the phase-frequency detector are verified.
PB - JACoW Publishing
CP - Geneva, Switzerland
SP - 3481
EP - 3483
KW - detector
KW - controls
KW - LLRF
KW - FPGA
KW - TRIUMF
DA - 2018/06
PY - 2018
SN - 978-3-95450-184-7
DO - 10.18429/JACoW-IPAC2018-THPAK106
UR - http://jacow.org/ipac2018/papers/thpak106.pdf
ER -