ICALEPCS2019 - List of Authors (Brown, D.G.)

Paper	Title	Page
MOPHA066	Electronics for LCLS-II Beam Containment System Shut-off	366
MOPHA065	use link to see paper's listing under its alternate paper code
	R.A. Kadyrov, D.G. Brown, E.P. Chin, C.I. Clarke, M. Petree, E. Rodriguez, F. Tao SLAC, Menlo Park, California, USA
	LCLS-II is a new FEL which is under construction at SLAC National Accelerator Laboratory. Its superconducting electron linac is able to produce up to 1.2 MW of beam power. Beam Containment System (BCS) is employed to limit the beam power and prevent excessive radiation in case of electron beam loss or FEL breach. Fast and slow shut-off paths are designed for devices with different response requirements. The system is required to shut-off the beam within 200 µs for some of the fast sensors. Fast path is based on custom electronic designs, and slow path leverages industrial safety-rated PLC hardware. The system spans for 4 km of LCLS-II and combines inputs from about 150 sensors of different complexity. Architecture is based on multiple levels starting with summing sensor inputs locally and to converting them into permits for the shut-off devices. Each level is implemented redundantly. Automated test and manual tests at all levels are implemented in the system. System architecture, electronics design and cable plant challenges are presented below.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA066
About •	paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCPR03	A Safety Rated FPGA Framework for Fast Safety Systems	1626
	F. Tao, B.M. Bennett, D.G. Brown, J. Jones, M.W. Stettler SLAC, Menlo Park, California, USA
	In this paper, we will introduce a generic safety-rated FPGA design template. FMEDA analysis, hardware reliability modeling, firmware development, verification and validation will be described in details to demonstrate the IEC 61508 compliant development process. In this dual redundant design, each chain consists a FPGA chip from different manufacturers to minimize the potential common cause failures. Cross checks between FPGAs and end-to-end self-checks are performed to increase the diagnostic coverage and improve the reliability. Based on this safety FPGA template, an Average Current Monitor (ACM) system is developed at SLAC with the addition of a safety PLC for diagnostics and a HMI for user interface. The overall system is deployed as part of Beam Containment System (BCS) to limit the beam current with the target Safety Integrity Level (SIL) 2.
DOI •	reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-THCPR03
About •	paper received ※ 01 October 2019 paper accepted ※ 08 October 2019 issue date ※ 30 August 2020
Export •	reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

Paper

Title

Page

MOPHA066

Electronics for LCLS-II Beam Containment System Shut-off

366

MOPHA065

use link to see paper's listing under its alternate paper code

R.A. Kadyrov, D.G. Brown, E.P. Chin, C.I. Clarke, M. Petree, E. Rodriguez, F. Tao
SLAC, Menlo Park, California, USA

LCLS-II is a new FEL which is under construction at SLAC National Accelerator Laboratory. Its superconducting electron linac is able to produce up to 1.2 MW of beam power. Beam Containment System (BCS) is employed to limit the beam power and prevent excessive radiation in case of electron beam loss or FEL breach. Fast and slow shut-off paths are designed for devices with different response requirements. The system is required to shut-off the beam within 200 µs for some of the fast sensors. Fast path is based on custom electronic designs, and slow path leverages industrial safety-rated PLC hardware. The system spans for 4 km of LCLS-II and combines inputs from about 150 sensors of different complexity. Architecture is based on multiple levels starting with summing sensor inputs locally and to converting them into permits for the shut-off devices. Each level is implemented redundantly. Automated test and manual tests at all levels are implemented in the system. System architecture, electronics design and cable plant challenges are presented below.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-MOPHA066

About •

paper received ※ 27 September 2019 paper accepted ※ 10 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

THCPR03

A Safety Rated FPGA Framework for Fast Safety Systems

1626

F. Tao, B.M. Bennett, D.G. Brown, J. Jones, M.W. Stettler
SLAC, Menlo Park, California, USA

In this paper, we will introduce a generic safety-rated FPGA design template. FMEDA analysis, hardware reliability modeling, firmware development, verification and validation will be described in details to demonstrate the IEC 61508 compliant development process. In this dual redundant design, each chain consists a FPGA chip from different manufacturers to minimize the potential common cause failures. Cross checks between FPGAs and end-to-end self-checks are performed to increase the diagnostic coverage and improve the reliability. Based on this safety FPGA template, an Average Current Monitor (ACM) system is developed at SLAC with the addition of a safety PLC for diagnostics and a HMI for user interface. The overall system is deployed as part of Beam Containment System (BCS) to limit the beam current with the target Safety Integrity Level (SIL) 2.

DOI •

reference for this paper ※ https://doi.org/10.18429/JACoW-ICALEPCS2019-THCPR03

About •

paper received ※ 01 October 2019 paper accepted ※ 08 October 2019 issue date ※ 30 August 2020

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)