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TY - CONF AU - Andreassen, O.Ø. AU - Charrondière, C. AU - Develle, K. AU - Rossel, R.E. AU - Zilliox, T. ED - White, Karen S. ED - Brown, Kevin A. ED - Dyer, Philip S. ED - Schaa, Volker RW TI - Evaluation of Timing and Synchronization Techniques on NI CompactRIO Platforms J2 - Proc. of ICALEPCS2019, New York, NY, USA, 05-11 October 2019 CY - New York, NY, USA T2 - International Conference on Accelerator and Large Experimental Physics Control Systems T3 - 17 LA - english AB - For distributed data acquisition and control system, clock synchronization between devices is key. The internal CPU clock of a CompactRIO has an accuracy of 40 ppm at 25 degree Celsius, which can cause up to 3 sec of drift per day. To compensate for this drift, common practice is to use a central clock (such as NTP) to synchronize the systems. In addition, the cRIO has an onboard FPGA which has its own 40 MHz clock. This clock is not synchronized with the CPU, and will also cause time drift. For short measurements, this drift is usually negligible, but for continuous data acquisition systems, running 24/7, the accumulated error has to be compensated. This article will show how we synchronized all clocks across multiple systems used for monitoring seismic activities in the LHC underground and surface areas. It will also describe the mechanism used to cross check synchronization by using the CERN developed White Rabbit timing system. PB - JACoW Publishing CP - Geneva, Switzerland SP - 1141 EP - 1144 KW - FPGA KW - controls KW - network KW - timing KW - hardware DA - 2020/08 PY - 2020 SN - 2226-0358 SN - 978-3-95450-209-7 DO - doi:10.18429/JACoW-ICALEPCS2019-WEPHA027 UR - https://jacow.org/icalepcs2019/papers/wepha027.pdf ER -