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BiBTeX citation export for WEMPL002: Project Nheengatu: EPICS support for CompactRIO FPGA and LabVIEW-RT

@InProceedings{alnajjar:icalepcs2019-wempl002,
  author       = {D. Alnajjar and G.S. Fedel and J.R. Piton},
  title        = {{Project Nheengatu: EPICS support for CompactRIO FPGA and LabVIEW-RT}},
  booktitle    = {Proc. ICALEPCS'19},
  pages        = {997--1000},
  paper        = {WEMPL002},
  language     = {english},
  keywords     = {FPGA, EPICS, LabView, controls, software},
  venue        = {New York, NY, USA},
  series       = {International Conference on Accelerator and Large Experimental Physics Control Systems},
  number       = {17},
  publisher    = {JACoW Publishing, Geneva, Switzerland},
  month        = {08},
  year         = {2020},
  issn         = {2226-0358},
  isbn         = {978-3-95450-209-7},
  doi          = {10.18429/JACoW-ICALEPCS2019-WEMPL002},
  url          = {https://jacow.org/icalepcs2019/papers/wempl002.pdf},
  note         = {https://doi.org/10.18429/JACoW-ICALEPCS2019-WEMPL002},
  abstract     = {A novel solution for integrating EPICS with Compact RIO (cRIO), the real-time embedded industrial controllers by National Instruments (NI), is proposed under the name Nheengatu (NHE). The cRIO controller, which is equipped with a processor running a real-time version of Linux (LinuxRT) and a Xilinx Kintex FPGA, is extremely powerful for control systems since it can be used to program real-time complex data processing and fine control tasks on both the LinuxRT and the FPGA. The proposed solution enables the control and monitoring of all tasks running on LinuxRT and the FPGA through EPICS. The devised solution is not limited to any type of cRIO module. Its architecture can be abstracted into four groups: FPGA and LabVIEW-RT interface blocks, the Nheengatu library, Device Support and IOC. The Nheengatu library, device support and IOC are generic - they are compiled only once and can be deployed on all cRIOs available. Consequently, a setup-specific configuration file is provided to the IOC upon instantiation. The configuration file contains all data for the devised architecture to configure the FPGA and to enable communication between EPICS and the FPGA/LabVIEW-RT interface blocks.},
}