Liu, D. K.

Paper	Title	Page
TPPA14	Scope-Embedded IOC Development in SSRF	117
	Y. Z. Chen, Z. C. Chen, D. K. Liu, W. M. Zhou, Y. B. Leng SINAP, Shanghai
	The dozen of wide-band beam diagnostics sensors such as integration current transformer, faraday cup, and wall current monitors were used in SSRF(Shanghai Synchrtron Radiation Facility) Linac and transport line to measure bunch shape and charge. Few hundreds MHz bandwidth required very high speed digitizer like digital sampling scope. On the other hand SSRF control system was built on EPICS platform. So Windows PC based Tektronics scope, which equipped with TekVISA interface, Shared Memory IOCcore EPICS interface, and Labview application was chosen to do this data acquisition. The details of software design and the performance evaluation results for TDS7104 and DPO7054 will be described in this paper.
TPPB08	Present Status of SSRF Control System	178
	L. R. Shen, D. K. Liu SINAP, Shanghai
	Shanghai Synchrotron Radiation Facility is a third-generation light source with 150MeV LINAC, 3.5Gev booster, and storage ring. The SSRF control system is a hierarchical standard accelerator control system based on EPICS. The VME 64X system and PLCs are used for various low-level device controls and interlock systems. Serial device servers connect serial devices and instrumentation to the Ethernet. All control subsystems are under construction. The hardware and software system development environment has been set up. Most of the subsystem models, such as the digital power supply control and event timing systems, have been set up and are being tested with devices on schedule. The high-level physical application environment has been set up and undergone online testing of device control using MatLab with Accelerator Toolbox and a middle layer. A set of tools (e.g., configuration tools and an alarm handler) has been set up for the center's database. An enhanced distributed archive engine has been created to store data using native XML data type with XML schema for data storage. Various testing results of the control systems for SSRF equipment will be described in this paper.
TPPB20	SSRF Beam Instrumentations System	205
	J. Chen, Y. Z. Chen, Z. C. Chen, D. K. Liu, K. R. Ye, C. X. Yin, J. Yu, L. Y. Yu, R. Yuan, G. B. Zhao, W. M. Zhou, Y. Zou, Y. B. Leng SINAP, Shanghai
	SSRF is equipped with various beam instrumentations, in which the Linac part has been working well since the start of the commissioning this year, and the booster and storage ring parts are still under implementation and commissioning. The commercial products were adopted to build this system as much as possible. The all-in-one electron beam position monitor processor, Libera, was used for whole facility to provide single-pass, first-turn, turn-by-turn, COD, and fast application beam position data. The Bergoz NPCT175 parametric current transformers were used for DC current measurement in the booster and storage ring. The various optical beam diagnostic systems, such as synchrotron radiation interferometers for precise beam-size measurement, the fast gated camera, and the bunch length monitor will be equipped in the dedicated diagnostics beam line. Data acquisition for beam instrumentation system should be a part of control system, developed on an EPICS platform. There are three kinds of Input Output Controllers (IOCs) used in diagnostics: VxWorks-based VME IOCs, Linux-based Libera IOCs, and Windows-based PC IOCs.
FOAB02	Digital Phase Control System for SSRF Linac	717
	D. K. Liu, L. Y. Yu, C. X. Yin SINAP, Shanghai
	SSRF 150MeV linac includes two klystrons and two solid power amplifers, which drive two klystrons, respectively. The accelerating section is constant gradient accelerating structure, and its working frequency is 2998MHz, six times the storage ring RF frequency. In order to reach the requirement for the RF phase stability (±1 degree), the full digital phase control system, which includes RF front-end, AD, DA, and FPGA, is designed. FPGA, the key for phase control system, contains digital I/Q demoulator (phase detector), digital I/Q modulator (phase shifter), and control algorithms. Klystron forward signal is down converted to IF (12.5MHz), which is detected by ADC with 50MHz clock. Digital I/Q is generated by ADC sampling data and then sent to control algorithms in FPGA. After processed by control algorithms, digital I/Q is converted to IF by DAC (50MHz). IF signal from DAC output is up converted to RF and sent to solid RF power amplifer. With the aid of FPGA, the whole period of closed-loop is about 80ns, and delay of closed-loop is less than 600ns. The test results of digital phase control system are presented in this paper.
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