BNL, Upton, Long Island, New York, USA
The operating parameters for Brookhaven National Laboratory's Low Energy RHIC Electron Cooling (LEReC) project create a unique challenge. To ensure proper beam trajectories for cooling, the relative position between the electron and the ion beam needs to be known to within 50μm. In addition, time of flight needs to be provided for electron beam energy measurement. Various issues have become apparent as testing has progressed, such as mismatches in cable impedance and drifts due to temperature sensitivity. This paper will explore the difficulties related to achieving the level of accuracy required for this system, as well as the potential solutions for these problems.
BNL, Upton, Long Island, New York, USA
Brookhaven National Laboratory's BLIP facility produces radioisotopes for the nuclear medicine community and industry, and performs research to develop new radioisotopes desired by nuclear medicine investigators. A raster scanning system was recently completed in December 2015 and fully commissioned in January 2016 to provide improved beam distribution on the targets, allow higher beam intensities, and ultimately increase production yield of the isotopes. The project included the installation of horizontal and vertical dipole magnets driven at 5 kHz with 90 deg phase separation to produce a circular beam raster pattern, a beam interlock system, and several instrumentation devices including multi-wire profile monitors, a laser profile monitor, beam current transformers and a beam position monitor. The first year operational experiences will be presented.
BNL, Upton, Long Island, New York, USA
A new BPM electronics module (V301) has been developed at BNL that uses the latest System on a Chip (SoC) technologies to provide a system with better performance and lower cost per module than before. The future of RHIC ion runs will include new RF conditions as well as a wider dynamic range in intensity. Plans for the use of electron beams, both in ion cooling applications and a future electron-ion collider, have also driven this architecture toward a highly configurable approach. The RF input section has been designed such that jumpers can be changed to allow a single board to provide ion or electron optimized analog filtering. These channels are sampled with four 14-bit 400MSPS A/D converters. The SoC's ARM processor allows a Linux OS to run directly on the module along with a controls system software interface. The FPGA is used to process samples from the ADCs and perform position calculations. A suite of peripherals including dual Ethernet ports, uSD storage, and an interface to the RHIC timing system are also included. A second revision board which includes ultra-low jitter ADC clock synthesis and distribution and improved power supplies is currently being commissioned.