PCaPAC2014 - Table of Session: TCO3 (Hardware)

Paper

Title

Page

Inexpensive Scheduling in FPGAs

150

W.W. Terpstra, D.H. Beck, M. Kreider
GSI, Darmstadt, Germany

In the new scheme for machine control used within the FAIR project, actions are distributed to front-end controllers (FEC) with absolute execution timestamps. The execution time must be both precise to the nanosecond and scheduled faster than a microsecond, requiring a hardware solution. Although the actions are scheduled at the FEC out of order, they must be executed in sorted order. The typical hardware approaches to implementing a priority queue (CAMs, shift-registers, etc.) work well in ASIC designs, but must be implemented in expensive FPGA core logic. Conversely, the typical software approaches (heaps, calendar queues, etc.) are either too slow or too memory intensive. We present an approach which exploits the time-ordered nature of our problem to sort in constant-time using only a few memory blocks.

Slides TCO301 [1.370 MB]

TCO303

TestBed - Automated Hardware-in-the-Loop Test Framework

153

P.A. Maslov, K.A. Meyer, K. Žagar
Cosylab, Ljubljana, Slovenia

Funding: This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 289485.
The control systems in big physics facilities may be updated several times a year. Ideally, prior to each release all components of the control system would be tested. One common control system component is a DAQ driver which is generally tested manually according to a predefined test plan. In order to simplify this process, we have developed the TestBed suite, a test framework that executes tests automatically. TestBed is a PXI chassis which contains an embedded controller running the control system on Scientific Linux and a DAQ board capable of generating and acquiring analog and digital signals. TestBed provides an easy-to-use framework written in Python and allows for the quick development and execution of automatic test scripts. From a hardware perspective, each system under test is physically connected to TestBed with a connector board using a predefined pin configuration. Both the system under test and TestBed are connected to the network. The resulting test framework makes it possible for the automatic tests to be executed with each new release of the control system, thus liberating human resources and ensuring complete consistency and repeatability in the testing protocol.

Slides TCO303 [0.703 MB]

TCO304

Launching the FAIR Timing System with CRYRING

155

M. Kreider
Glyndŵr University, Wrexham, United Kingdom
R. Bär, D.H. Beck, A. Hahn, M. Kreider, C. Prados, S. Rauch, W.W. Terpstra, M. Zweig
GSI, Darmstadt, Germany
J.N. Bai
IAP, Frankfurt am Main, Germany

During the past two years, significant progress has been made on the development of the General Machine Timing system for the upcoming FAIR facility at GSI. The prime features are time-synchronization of 2000-3000 nodes using the White Rabbit Precision-Time-Protocol (WR-PTP), distribution of International Atomic Time (TAI) time stamps and synchronized command and control of FAIR control system equipment. A White Rabbit network has been set up connecting parts of the existing facility and a next version of the Timing Master has been developed. Timing Receiver nodes in form factors Scalable Control Unit (standard front-end controller for FAIR), VME, PCIe and standalone have been developed. CRYRING is the first machine on the GSI/FAIR campus to be operated with this new timing system and serves as a test-ground for the complete control system. Installation of equipment starts in late spring followed by commissioning of equipment in summer 2014.

Slides TCO304 [7.818 MB]

TCO305

TCP/IP Control System Interface Development Using Microchip* Brand Microcontrollers

158

C.E. Peters, M.A. Power
ANL, Argonne, Illinois, USA

Funding: This work was supported by the U.S. Department of Energy, Office of Nuclear Physics, under Contract No. DE-AC02-06CH11357.
Even as the diversity and capabilities of Single-Board-Computers (SBCs) like the Raspberry Pi and BeagleBoard continue to increase, low level microprocessor solutions also offer the possibility of robust distributed control system interfaces. Since they can be smaller and cheaper than even the least expensive SBC, they are easily integrated directly onto printed circuit boards either via direct mount or pre-installed headers. The ever increasing flash-memory capacity and processing clock speeds has enabled these types of microprocessors to handle even relatively complex tasks such as management of a full TCP/IP software and hardware stack. The purpose of this work is to demonstrate several different implementation scenarios wherein a computer control system can communicate directly with an off-the-shelf Microchip brand microcontroller and its associated peripherals. The microprocessor can act as a Hardware-to-Ethernet communication bridge and provide services such as distributed reading and writing of analog and digital values, webpage serving, simple network monitoring and others to any custom electronics solution.
* Microchip Technology Inc., www.microchip.com

Slides TCO305 [3.904 MB]

TCO306

Reconfigurable Oscilloscopes for Applications in Scientific Research

B.R. Glass
National Instruments, Austin, Texas, USA

Signal processing and control tasks in scientific research applications have traditionally relied on analog electronics and relatively slow ADCs to capture preconditioned signals. Continuous improvements in the sampling rate and resolution of commercial ADCs have allowed for an increasing number of signals to be sampled directly from sensors. With the incorporation of FPGAs, signal processing and control can be performed in real-time during acquisition. A new class of reconfigurable oscilloscopes extends the reach of PCIe-based modular instrumentation by incorporating a user-programmable FPGA for in-line signal processing, real-time control, and advanced triggering with zero dead-time. Researchers have demonstrated the power and flexibility of these instruments in recent nuclear and high-energy physics applications.

Slides TCO306 [5.559 MB]

Paper	Title	Page
TCO301	Inexpensive Scheduling in FPGAs	150
	W.W. Terpstra, D.H. Beck, M. Kreider GSI, Darmstadt, Germany
	In the new scheme for machine control used within the FAIR project, actions are distributed to front-end controllers (FEC) with absolute execution timestamps. The execution time must be both precise to the nanosecond and scheduled faster than a microsecond, requiring a hardware solution. Although the actions are scheduled at the FEC out of order, they must be executed in sorted order. The typical hardware approaches to implementing a priority queue (CAMs, shift-registers, etc.) work well in ASIC designs, but must be implemented in expensive FPGA core logic. Conversely, the typical software approaches (heaps, calendar queues, etc.) are either too slow or too memory intensive. We present an approach which exploits the time-ordered nature of our problem to sort in constant-time using only a few memory blocks.
	Slides TCO301 [1.370 MB]

TCO303	TestBed - Automated Hardware-in-the-Loop Test Framework	153
	P.A. Maslov, K.A. Meyer, K. Žagar Cosylab, Ljubljana, Slovenia
	Funding: This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 289485. The control systems in big physics facilities may be updated several times a year. Ideally, prior to each release all components of the control system would be tested. One common control system component is a DAQ driver which is generally tested manually according to a predefined test plan. In order to simplify this process, we have developed the TestBed suite, a test framework that executes tests automatically. TestBed is a PXI chassis which contains an embedded controller running the control system on Scientific Linux and a DAQ board capable of generating and acquiring analog and digital signals. TestBed provides an easy-to-use framework written in Python and allows for the quick development and execution of automatic test scripts. From a hardware perspective, each system under test is physically connected to TestBed with a connector board using a predefined pin configuration. Both the system under test and TestBed are connected to the network. The resulting test framework makes it possible for the automatic tests to be executed with each new release of the control system, thus liberating human resources and ensuring complete consistency and repeatability in the testing protocol.
	Slides TCO303 [0.703 MB]

TCO304	Launching the FAIR Timing System with CRYRING	155
	M. Kreider Glyndŵr University, Wrexham, United Kingdom R. Bär, D.H. Beck, A. Hahn, M. Kreider, C. Prados, S. Rauch, W.W. Terpstra, M. Zweig GSI, Darmstadt, Germany J.N. Bai IAP, Frankfurt am Main, Germany
	During the past two years, significant progress has been made on the development of the General Machine Timing system for the upcoming FAIR facility at GSI. The prime features are time-synchronization of 2000-3000 nodes using the White Rabbit Precision-Time-Protocol (WR-PTP), distribution of International Atomic Time (TAI) time stamps and synchronized command and control of FAIR control system equipment. A White Rabbit network has been set up connecting parts of the existing facility and a next version of the Timing Master has been developed. Timing Receiver nodes in form factors Scalable Control Unit (standard front-end controller for FAIR), VME, PCIe and standalone have been developed. CRYRING is the first machine on the GSI/FAIR campus to be operated with this new timing system and serves as a test-ground for the complete control system. Installation of equipment starts in late spring followed by commissioning of equipment in summer 2014.
	Slides TCO304 [7.818 MB]

TCO305	TCP/IP Control System Interface Development Using Microchip* Brand Microcontrollers	158
	C.E. Peters, M.A. Power ANL, Argonne, Illinois, USA
	Funding: This work was supported by the U.S. Department of Energy, Office of Nuclear Physics, under Contract No. DE-AC02-06CH11357. Even as the diversity and capabilities of Single-Board-Computers (SBCs) like the Raspberry Pi and BeagleBoard continue to increase, low level microprocessor solutions also offer the possibility of robust distributed control system interfaces. Since they can be smaller and cheaper than even the least expensive SBC, they are easily integrated directly onto printed circuit boards either via direct mount or pre-installed headers. The ever increasing flash-memory capacity and processing clock speeds has enabled these types of microprocessors to handle even relatively complex tasks such as management of a full TCP/IP software and hardware stack. The purpose of this work is to demonstrate several different implementation scenarios wherein a computer control system can communicate directly with an off-the-shelf Microchip brand microcontroller and its associated peripherals. The microprocessor can act as a Hardware-to-Ethernet communication bridge and provide services such as distributed reading and writing of analog and digital values, webpage serving, simple network monitoring and others to any custom electronics solution. * Microchip Technology Inc., www.microchip.com
	Slides TCO305 [3.904 MB]

TCO306	Reconfigurable Oscilloscopes for Applications in Scientific Research
	B.R. Glass National Instruments, Austin, Texas, USA
	Signal processing and control tasks in scientific research applications have traditionally relied on analog electronics and relatively slow ADCs to capture preconditioned signals. Continuous improvements in the sampling rate and resolution of commercial ADCs have allowed for an increasing number of signals to be sampled directly from sensors. With the incorporation of FPGAs, signal processing and control can be performed in real-time during acquisition. A new class of reconfigurable oscilloscopes extends the reach of PCIe-based modular instrumentation by incorporating a user-programmable FPGA for in-line signal processing, real-time control, and advanced triggering with zero dead-time. Researchers have demonstrated the power and flexibility of these instruments in recent nuclear and high-energy physics applications.
	Slides TCO306 [5.559 MB]