• C. Burkhart, T.G. Beukers, M.A. Kemp, R.S. Larsen, K.J.P. Macken, M.N. Nguyen, J.J. Olsen, T. Tang
  SLAC, Menlo Park, California

Funding: Work supported by the U.S. Department of Energy under contract DE-AC02-76SF00515

A program is underway at SLAC to develop a Marx-topology klystron modulator for the International Linear Collider* project. It is envisioned as a smaller, lower cost, and higher reliability alternative to the bouncer-topology baseline design. The application requires 120 kV (±0.5%), 140 A, 1.6 ms pulses at a rate of 5 Hz. The Marx constructs the high voltage pulse without an output transformer, large at these parameters, by instead combining a number of lower voltage cells in series. The modularity of the Marx topology is further exploited to achieve a redundant, high-availability design. The ILC Marx employs solid state elements; IGBTs and diodes, to control the charge, discharge and isolation of the cells. The SLAC designs are oil-free; air is used for high voltage insulation and cooling. The first generation prototype, P1, is undergoing life testing. Development of a second generation prototype, P2, is underway. Status updates for both prototypes will be presented.

*ILC Reference Design Report, http://www.linearcollider.org/cms/?pid=1000437

• S.R. Norum, S. Allison, J. Browne, S. Chevtsov, J.E. Dusatko, K.D. Kotturi, P. Krejcik, J.J. Olsen, T. Straumann, A.J. Tilghman
  SLAC, Menlo Park, California

Funding: SLAC/DOE Contract DE-AC02-76-SF00515

A state-of-the-art Machine Protection System for the SLAC Linac Coherent Light Source has been designed and built to shut off the beam within one pulse during 120 Hz operation to protect the facility from damage due to beam losses. Inputs from beam loss monitors, BPMs, toroids and position switches of insertable beam line devices are connected to a number of Link Node chassis placed along the beam line. Link Nodes are connected with a central Link Processor in a star topology on a dedicated gigabit Ethernet fiber network. The Link Processor, a Motorola MVME 6100, processes fault data at 360 Hz. After processing, rate limit commands are sent to mitigation devices at the injector and just upstream of the entrance of the sensitive undulator beam line. The beam's repetition rate is lowered according to the fault severity. The SLAC designed Link Nodes support up to 96 digital inputs and 8 digital outputs each. Analog signals are handled via standard IndustryPack (IP) cards placed on the Link Node motherboards with optional transition boards for signal conditioning. A database driven algorithm running on the Link Processor provides runtime loadable and swappable machine protection logic.