• C. Burkhart, T.G. Beukers, M.A. Kemp, R.S. Larsen, K.J.P. Macken, M.N. Nguyen, J.J. Olsen, T. Tang
  SLAC, Menlo Park, California

Funding: Work supported by the U.S. Department of Energy under contract DE-AC02-76SF00515

A program is underway at SLAC to develop a Marx-topology klystron modulator for the International Linear Collider* project. It is envisioned as a smaller, lower cost, and higher reliability alternative to the bouncer-topology baseline design. The application requires 120 kV (±0.5%), 140 A, 1.6 ms pulses at a rate of 5 Hz. The Marx constructs the high voltage pulse without an output transformer, large at these parameters, by instead combining a number of lower voltage cells in series. The modularity of the Marx topology is further exploited to achieve a redundant, high-availability design. The ILC Marx employs solid state elements; IGBTs and diodes, to control the charge, discharge and isolation of the cells. The SLAC designs are oil-free; air is used for high voltage insulation and cooling. The first generation prototype, P1, is undergoing life testing. Development of a second generation prototype, P2, is underway. Status updates for both prototypes will be presented.

*ILC Reference Design Report, http://www.linearcollider.org/cms/?pid=1000437

• R.S. Larsen, C. Adolphsen, D.J. McCormick, W.C. Ross, Z.M. Szalata
  SLAC, Menlo Park, California
• R.W. Downing
  R.W. Downing Inc., Tucson

Funding: US Department of Energy Contract DE AC03 76SF00515.

The ILC R&D electronics program at SLAC includes development of key technologies aimed at improving reliability and availability and reducing cost. This paper discusses the development of high availability interlocks and controls for the L-Band high power RF stations. A new Fast Fault Finder (F3) VME module has been developed to process both slow interlocks using FPGA logic to detect the interlock trip excursions. This combination eliminates the need for separate PLC control of slow interlocks with modules chained together to accommodate as many inputs as needed. Next a high availability platform demonstration will port the F3’s via a specially designed VME adapter module into the new industry standard ATCA[1] crate (shelf). This high-availability platform features an Intelligent Platform Management (IPMI) system to control and monitor the health of the entire system, provide redundancy as needed for the application, and demonstrate auto-failover and hot-swap to minimize MTTR. The goal is to demonstrate “five nines” (0.99999) system availability at the shelf level. A new international initiative, the xTCA for Physics Standards Working Group, will be briefly mentioned.

[1] Advanced Telecom Computing Architecture