• F.-J. Decker, R. Akre, A. Brachmann, W.S. Colocho, Y.T. Ding, D. Dowell, P. Emma, J.C. Frisch, A. Gilevich, G.R. Hays, P. Hering, Z. Huang, R.H. Iverson, K.D. Kotturi, A. Krasnykh, H. Loos, A. Miahnahri, H.-D. Nuhn, D.F. Ratner, J.L. Turner, J.J. Welch, W.E. White, J. Wu
  SLAC, Menlo Park, California

Funding: Work supported by Department of Energy contract DE-AC03-76SF00515.

The beam stability for the Linac Coherent Light Source (LCLS) at SLAC is important for good X-Ray operation. Although most of the jitter tolerances are met, there is always room for improvement. Besides the short term pulse-to-pulse jitter, we will also discuss oscillation sources of longer time cycles from seconds (feedbacks), to minutes (cooling systems), and up to the 24 hours caused by the day-night temperature variations.

• S.R. Norum, S. Allison, J. Browne, S. Chevtsov, J.E. Dusatko, K.D. Kotturi, P. Krejcik, J.J. Olsen, T. Straumann, A.J. Tilghman
  SLAC, Menlo Park, California

Funding: SLAC/DOE Contract DE-AC02-76-SF00515

A state-of-the-art Machine Protection System for the SLAC Linac Coherent Light Source has been designed and built to shut off the beam within one pulse during 120 Hz operation to protect the facility from damage due to beam losses. Inputs from beam loss monitors, BPMs, toroids and position switches of insertable beam line devices are connected to a number of Link Node chassis placed along the beam line. Link Nodes are connected with a central Link Processor in a star topology on a dedicated gigabit Ethernet fiber network. The Link Processor, a Motorola MVME 6100, processes fault data at 360 Hz. After processing, rate limit commands are sent to mitigation devices at the injector and just upstream of the entrance of the sensitive undulator beam line. The beam's repetition rate is lowered according to the fault severity. The SLAC designed Link Nodes support up to 96 digital inputs and 8 digital outputs each. Analog signals are handled via standard IndustryPack (IP) cards placed on the Link Node motherboards with optional transition boards for signal conditioning. A database driven algorithm running on the Link Processor provides runtime loadable and swappable machine protection logic.