Paper | Title | Page |
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TU6RFP090 | ILC Marx Modulator Development Program Status | 1757 |
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Funding: Work supported by the U.S. Department of Energy under contract DE-AC02-76SF00515 A program is underway at SLAC to develop a Marx-topology klystron modulator for the International Linear Collider* project. It is envisioned as a smaller, lower cost, and higher reliability alternative to the bouncer-topology baseline design. The application requires 120 kV (±0.5%), 140 A, 1.6 ms pulses at a rate of 5 Hz. The Marx constructs the high voltage pulse without an output transformer, large at these parameters, by instead combining a number of lower voltage cells in series. The modularity of the Marx topology is further exploited to achieve a redundant, high-availability design. The ILC Marx employs solid state elements; IGBTs and diodes, to control the charge, discharge and isolation of the cells. The SLAC designs are oil-free; air is used for high voltage insulation and cooling. The first generation prototype, P1, is undergoing life testing. Development of a second generation prototype, P2, is underway. Status updates for both prototypes will be presented. *ILC Reference Design Report, http://www.linearcollider.org/cms/?pid=1000437 |
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TU6RFP091 | Development of an Adder-Topology ILC Damping Ring Kicker Modulator | 1760 |
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Funding: Work supported by the Department of Energy under contract No. DE-AC02-76SF00515 The injection and extraction kickers (50 Ω) for the ILC damping rings will require highly reliable modulators to deliver ±5 kV, 2 ns flattop (~1 ns rise and fall time) electrical pulses at up to 6 MHz*. An effort is underway at SLAC National Accelerator Laboratory to meet these requirements using a transmission line adder topology to combine the output of an array of ~1 kV modules. The modules employ an ultra-fast hybrid driver/MOSFET that can switch 33 A in 1.2 ns. Experimental results for a scale adder structure will be presented. *ILC Reference Design Report, http://www.linearcollider.org/cms/?pid=1000437 |
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TU6RFP093 | Redesign of the H-Bridge Switch Plate of the SNS High Voltage Converter Modulator | 1763 |
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Funding: Work supported by the Department of Energy under contract No. DE-AC02-76SF00515. The 1-MW High Voltage Converter Modulators* have operated in excess of 250,000 hours at the Spallation Neutron Source. Increased demands on the accelerator performance require increased modulator reliability. An effort is underway at SLAC National Accelerator Laboratory to redesign the modulator H-bridge switch plate with the goals of increasing reliability and performance**. The major difference between the SLAC design and the existing design is the use of press-pack IGBTs. Compared to other packaging options, these IGBTs have been shown to have increased performance in pulsed-power applications, have increased cooling capability, and do not fragment and disassemble during a fault event. An overview of the SLAC switch plate redesign is presented. Design steps including electrical modeling of the modulator and H-bridge, development of an integrated IGBT clamping mechanism, and heat sink performance validation are discussed. Experimental results will be presented comparing electrical performance of the SLAC switch plate to the existing switchplate under normal and fault conditions. *W. A. Reass, et al., “Design, Status, and First Operations of the Spallation Neutron Source Polyphase
”, PAC, 2003 |
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TU6RFP094 | Advanced Gate Drive for the SNS High Voltage Converter Modulator | 1766 |
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Funding: Work supported by the Department of Energy under contract No. DE-AC02-76SF00515. SLAC National Accelerator Laboratory is developing a next generation H-bridge switch plate*, a critical component of the SNS High Voltage Converter Modulators**. As part of that effort, a new IGBT gate driver has been developed. The drivers are an integral part of the switch plate, which are essential to ensuring fault-tolerant, high-performance operation of the modulator. The redesigned drivers improve upon the existing gate drives in several ways. The new gate driver has improved fault detection and suppression capabilities; suppression of shoot-through and over-voltage conditions, monitoring of excess di/dt and Vce,sat, and redundant power isolation are some of the added features. Also, triggering insertion delay is reduced by a factor of four compared to the existing driver. This presentation details the design and performance of the new IGBT gate driver. A detailed schematic and description of the construction are included. Operation of the fast over-current detection circuits, active IGBT over-voltage protection circuit, shoot-through prevention and control power isolation breakdown detection circuit are discussed. *W. A. Reass, et al., “Design, Status, and First Operations of the Spallation Neutron Source Polyphase
”, PAC, 2003 |
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TU6RFP095 | Towards a PEBB-Based Design Approach for a Marx-Topology ILC Klystron Modulator | 1769 |
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Funding: Work supported by the U.S. Department of Energy under contract DE-AC02-76SF00515 Introduced by the U.S. Navy more than a decade ago*, the concept of Power Electronic Building Blocks (PEBBs) has been successfully applied in various applications. It is well accepted within the power electronics arena that this concept offers the potential to achieve increased levels of modularity and compactness. This approach is thus ideally suited for applications where easy serviceability and high availability are key, such as the ILC. This paper presents a building block approach for designing Marx modulators. First the concept of "bricks and buses" is briefly discussed. Then a PEBB-oriented design is presented for the basic Marx cell of a 32-cell Marx modulator to power an ILC klystron; 120 kV, 140 A, 1.6 ms pulses at a repetition rate of 5 Hz. Each basic Marx cell is composed of a main cell and a correction cell that compensates the main cell droop. The main cell has a stored energy of 2.1 kJ per Marx cell and the correction cell an additional 0.5 kJ. This design allows over 30% of the total stored energy in the Marx modulator, 84 kJ, to be delivered in the output pulse, 26.9 kJ, while keeping the droop within a ±0.5% range. *T. Ericsen. 'Power Electronics Building Blocks - A systematic approach to power electronics.' In: Proceedings of Power Engineering Society Summer Meeting, Seattle, WA, 16-20 July 2000. |