• R. Eichhorn, A. Araz, J. Conrad, F. Hug, M. Konrad, T. Quincey
  TU Darmstadt, Darmstadt

The Superconducting Linear Accelerator S-DALINAC at the University of Darmstadt (Germany) is a recirculating Linac with two recirculations. Currently acceleration in the Linac section is done on crest of the accelerating field. The recirculation path is operated achromatic and isochronous. In this recirculation scheme the energy spread of the resulting beam in the ideal case is determined by the electron bunch length. Taking into account the stability of the RF system the energy spread increases drastically. In this work we will present a new non-isochronous recirculation scheme which helps canceling out these errors from the rf-control. This scheme uses longitudinal dispersion in the recirculation pathes and an acceleration off-crest with a certain phase with respect to the maximum. We will present beam dynamic calculations which show the usability of this system even in a Linac with only two recirculations and first experimental results

• M. Konrad, U. Bonnes, C. Burandt, R. Eichhorn, N. Pietralla
  TU Darmstadt, Darmstadt

The superconducting cavities of the S-DALINAC have a high loaded quality factor and are very susceptible to microphonics. To stabilize the amplitude and phase of the cavities' fields an analog control system has been used for 20 years. To improve the stability and the availability of the low level RF control system it is currently replaced by a digital one. The 3 GHz signals coming from the cavities are converted down to the base band using hardware I/Q demodulators. The base band signals are digitized by ADCs and fed into an FPGA. This FPGA contains a custom CPU which executes the code implementing the control algorithm. The computed control signal is I/Q modulated before it is send to the cavity again. The superconducting cavities are operated with a self-excited loop algorithm whereas a generator driven algorithm is used for the low Q normal conducting bunching cavities. A 6 GHz RF board allows the operation of a new 2f buncher. Parameters can be adjusted via an EPICS IOC running on a standard PC. All signals from the FPGA can be monitored in realtime by the operator.