Author: Dedic, J.     [Dedič, J.]
Paper Title Page
MOPWA088 FPGA Development Approach for Accelerator Systems with High Integration Complexity 876
 
  • J. Dedič, K. Žagar
    COBIK, Solkan, Slovenia
  • A.M.M. Aulin Söderqvist, N.H. Claesson, R. Tavčar
    Cosylab, Ljubljana, Slovenia
  • J. Neves Rodrigues
    Lund University, Lund, Sweden
 
  Dur­ing the ap­pli­ca­tion-layer FPGA de­vel­op­ment for tim­ing sys­tem for a med­ical ac­cel­er­a­tor (ac­cel­er­a­tor: MedAus­tron, tim­ing sys­tem: Micro Re­search Fin­land) and a cou­ple of other FPGA pro­jects (power sup­ply wave­form gen­er­a­tor, Ma­chine Pro­tec­tion Sys­tem proof of con­cept, ESS tim­ing sys­tem demo) we got very good in­sight on how to ap­proach de­mand­ing FPGA de­vel­op­ment that re­quires team work of many de­vel­op­ers, cou­pled with par­tic­u­lar­i­ties of ac­cel­er­a­tor sys­tem de­vel­op­ment. Be­cause sub­sys­tems’ spe­cific re­quire­ments evolve to­gether with the op­er­a­tional un­der­stand­ing of the en­tire ma­chine, the care­ful bal­ance has to be taken be­tween re­quire­ments gath­er­ing, pro­to­typ­ing and de­vel­op­ment stage. Fur­ther­more, when doing ar­chi­tec­tural de­sign de­ci­sions, knowl­edge from mul­ti­ple do­mains should be taken into ac­count; ac­cel­er­a­tor op­er­a­tion, soft­ware de­vel­op­ment and FPGA de­vel­op­ment. The de­sign shouldn’t be reg­is­ter or counter cen­tric, and FPGA func­tion­al­ity shouldn’t ap­pear to the soft­ware de­vel­oper as fixed – oth­er­wise the de­sign de­ci­sions of one world will sooner or later lead to spaghetti-code workarounds in the other world.