IPAC2011 - List of Authors (Dies, J.)

Paper	Title	Page
THPS060	RAM Methodology and Activities for IFMIF Engineering Design	3565
	J.M. Arroyo, A. Ibarra, J. Molla CIEMAT, Madrid, Spain J. Abal, E. Bargalló, J. Dies, C. Tapia UPC, Barcelona, Spain
	IFMIF will be an accelerator-based neutron source to test fusion candidate materials. The Engineering Validation and Engineering Design Activities of IFMIF are aimed to deliver the complete engineering design file of this major facility. Achieving a high level of availability and reliability is a key point for IFMIF mission. A goal of 70% of operational availability has been established. In order to fulfill the availability requirements, RAM has to be considered during the engineering design phase. This paper summarizes the methodology developed and the proposed process aimed at including RAM in the design of IFMIF, as well as the activities performed in this framework. Overall RAM specifications have been defined for IFMIF project. RAM methodology dealing with RAM design guidelines, reliability database and RAM modelization has been developed. As a first step for the iterative process of RAM analysis of IFMIF design, a fault tree model based on a new reliability database has been performed with Risk Spectrum®. The result is a first assessment of the availability and first allocation of RAM requirements.

Paper

Title

Page

RAM Methodology and Activities for IFMIF Engineering Design

3565

J.M. Arroyo, A. Ibarra, J. Molla
CIEMAT, Madrid, Spain
J. Abal, E. Bargalló, J. Dies, C. Tapia
UPC, Barcelona, Spain

IFMIF will be an accelerator-based neutron source to test fusion candidate materials. The Engineering Validation and Engineering Design Activities of IFMIF are aimed to deliver the complete engineering design file of this major facility. Achieving a high level of availability and reliability is a key point for IFMIF mission. A goal of 70% of operational availability has been established. In order to fulfill the availability requirements, RAM has to be considered during the engineering design phase. This paper summarizes the methodology developed and the proposed process aimed at including RAM in the design of IFMIF, as well as the activities performed in this framework. Overall RAM specifications have been defined for IFMIF project. RAM methodology dealing with RAM design guidelines, reliability database and RAM modelization has been developed. As a first step for the iterative process of RAM analysis of IFMIF design, a fault tree model based on a new reliability database has been performed with Risk Spectrum®. The result is a first assessment of the availability and first allocation of RAM requirements.