Author: Carlier, E.
Paper Title Page
MOPGF122 A Fast Interlock Detection System for High-Power Switch Protection 367
 
  • P. Van Trappen, E. Carlier, S. Uyttenhove
    CERN, Geneva, Switzerland
 
  Fast pulsed kicker mag­net sys­tems are pow­ered by high-volt­age and high-cur­rent pulse gen­er­a­tors with ad­justable pulse length and am­pli­tude. To de­liver this power, fast high-volt­age switches such as thyra­trons and GTOs are used to con­trol the fast dis­charge of pre-stored en­ergy. To pro­tect the ma­chine and the gen­er­a­tor it­self against in­ter­nal fail­ures of these switches sev­eral types of fast in­ter­locks sys­tems are used at TE-ABT (CERN Tech­nol­ogy de­part­ment, Ac­cel­er­a­tor Beam Trans­fer). To get rid of this het­ero­ge­neous sit­u­a­tion, a mod­u­lar dig­i­tal Fast In­ter­lock De­tec­tion Sys­tem (FIDS) has been de­vel­oped in order to re­place the ex­ist­ing fast in­ter­locks sys­tems. In ad­di­tion to the ex­ist­ing func­tion­al­ity, the FIDS sys­tem will offer new func­tion­al­i­ties such as ex­tended flex­i­bil­ity, im­proved mod­u­lar­ity, in­creased sur­veil­lance and di­ag­nos­tics, con­tem­po­rary com­mu­ni­ca­tion pro­to­cols and au­to­mated card pa­ram­e­triza­tion. A Xil­inx Zynq®-7000 SoC has been se­lected for im­ple­men­ta­tion of the re­quired func­tion­al­i­ties so that the FPGA (Field Pro­gram­ma­ble Gate Array) can hold the fast de­tec­tion and in­ter­lock­ing logic while the ARM® proces­sors allow for a flex­i­ble in­te­gra­tion in CERN's Front-End Soft­ware Ar­chi­tec­ture (FESA) frame­work, ad­vanced di­ag­nos­tics and au­to­mated self-pa­ram­e­triza­tion.  
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MOPGF135 Upgrade of the Trigger Synchronisation and Distribution System of the Beam Dumping System of the Large Hadron Collider 397
 
  • N. Magnin, A. Antoine, E. Carlier, V. Chareyre, S. Gabourin, A. Patsouli, N. Voumard
    CERN, Geneva, Switzerland
 
  Var­i­ous up­grades were per­formed on the Large Hadron Col­lider (LHC) Beam Dump­ing Sys­tem (LBDS) dur­ing Long Shut­down 1 (LS1) at CERN, in par­tic­u­lar to the Trig­ger Syn­chro­ni­sa­tion and Dis­tri­b­u­tion Sys­tem (TSDS): A re­dun­dant di­rect con­nec­tion from the LHC Beam In­ter­lock Sys­tem to the re-trig­ger lines of the LBDS was im­ple­mented, a fully re­dun­dant pow­er­ing ar­chi­tec­ture was set up, and new Trig­ger Syn­chro­ni­sa­tion Unit cards were de­ployed over two sep­a­rate crates in­stead of one. These hard­ware changes im­plied the adap­ta­tion of the State Con­trol and Sur­veil­lance Sys­tem and an im­prove­ment of the mon­i­tor­ing and di­ag­no­sis sys­tems, like the var­i­ous In­ter­nal Post Op­er­a­tion Check (IPOC) sys­tems that en­sure that, after every beam dump event, the LBDS worked as ex­pected and is 'as good as new' for the next LHC beam. This paper sum­marises the changes per­formed on the TSDS dur­ing LS1, high­lights the up­grade of the IPOC sys­tems and pre­sents the prob­lems en­coun­tered dur­ing the com­mis­sion­ing of TSDS be­fore the LHC Run II.  
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WEPGF127 A Generic Timing Software for Fast Pulsed Magnet Systems at CERN 1003
 
  • C. Chanavat, M. Arruat, E. Carlier, N. Magnin
    CERN, Geneva, Switzerland
 
  At CERN, fast pulsed mag­net (kicker) sys­tems are used to in­ject, ex­tract, dump and ex­cite beams. De­pend­ing on their op­er­a­tional func­tion­al­i­ties and as a re­sult of the evo­lu­tion of con­trols so­lu­tions over time, the tim­ing con­trols of these sys­tems were based on hy­brid hard­ware ar­chi­tec­tures that have re­sulted in a large dis­par­ity of soft­ware so­lu­tions. In order to cure this sit­u­a­tion, a Kicker Tim­ing Soft­ware (KiTS), based on a mod­u­lar hard­ware and soft­ware ar­chi­tec­ture, has been de­vel­oped with the ob­jec­tive to in­crease the ho­mo­gene­ity of fast and slow tim­ings con­trol for all types of fast pulsed mag­net sys­tems. The KiTS uses a hard­ware ab­strac­tion layer and a con­fig­urable soft­ware model im­ple­mented within the Front-End Soft­ware Ar­chi­tec­ture (FESA) frame­work. It has been suc­cess­fully de­ployed in the con­trol sys­tems of the dif­fer­ent types of kicker sys­tems at CERN like for the PS con­tin­u­ous trans­fer, the SPS in­jec­tion and ex­trac­tion, the SPS tune mea­sure­ment and the LHC in­jec­tion.  
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