ICALEPCS2015 - List of Authors (An, S.)

Paper	Title	Page
MOPGF001	Use Interrupt Driven Mode to Redesign an IOC for Digital Power Supply at SSC-LINAC	98
	S. An, K. Gu, X.J. Liu, J.Q. Wu, W. Zhang IMP/CAS, Lanzhou, People's Republic of China
	SSC-LINAC control system is based on EPICS architecture. The sub control system of digital power supplies is a kind of IOC send and receive custom command via Ethernet and TCP/IP protocol. The old IOC is designed to use period scan mode IOC, and there are so many digital power supplies, that we can't make sure every connect condition of digital power supply is fine. IOC must wait a long time if one of them can't connect correctly and other digital power supply's PV may also be blocked. An IOC that uses interrupt driven mode to avoid the shortcoming was designed. This will be described in this paper.
	Poster MOPGF001 [0.796 MB]
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WEPGF034	The Power Supply Control System of CSR	772
	W. Zhang, S. An, S.Z. Gou, K. Gu, P. Li, Y.P. Wang, M. Yue IMP/CAS, Lanzhou, People's Republic of China
	This paper gives a brief description of the power supply control system for Cooler Storage Ring (CSR). It introduces in detail mainly of the control system architecture, hardware and software. We use standard distributed control system (DCS) architecture. The software is the standard three-layer structure. OPI layer realizes data generation and monitoring. The intermediate layer is a data processing and transmission. Device control layer performs data output of the power supply. We use ARM + DSP controller designed by ourselves for controlling the power supply output. At the same time, we have adopted the FPGA controller designed for timing for power supply control in order to meet the requirements of accelerator synchronized with the output of the power supply.
	Poster WEPGF034 [0.322 MB]
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Paper

Title

Page

Use Interrupt Driven Mode to Redesign an IOC for Digital Power Supply at SSC-LINAC

98

S. An, K. Gu, X.J. Liu, J.Q. Wu, W. Zhang
IMP/CAS, Lanzhou, People's Republic of China

SSC-LINAC control system is based on EPICS architecture. The sub control system of digital power supplies is a kind of IOC send and receive custom command via Ethernet and TCP/IP protocol. The old IOC is designed to use period scan mode IOC, and there are so many digital power supplies, that we can't make sure every connect condition of digital power supply is fine. IOC must wait a long time if one of them can't connect correctly and other digital power supply's PV may also be blocked. An IOC that uses interrupt driven mode to avoid the shortcoming was designed. This will be described in this paper.

Poster MOPGF001 [0.796 MB]

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reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)

WEPGF034

The Power Supply Control System of CSR

772

W. Zhang, S. An, S.Z. Gou, K. Gu, P. Li, Y.P. Wang, M. Yue
IMP/CAS, Lanzhou, People's Republic of China

This paper gives a brief description of the power supply control system for Cooler Storage Ring (CSR). It introduces in detail mainly of the control system architecture, hardware and software. We use standard distributed control system (DCS) architecture. The software is the standard three-layer structure. OPI layer realizes data generation and monitoring. The intermediate layer is a data processing and transmission. Device control layer performs data output of the power supply. We use ARM + DSP controller designed by ourselves for controlling the power supply output. At the same time, we have adopted the FPGA controller designed for timing for power supply control in order to meet the requirements of accelerator synchronized with the output of the power supply.

Poster WEPGF034 [0.322 MB]

Export •

reference for this paper using ※ BibTeX, ※ LaTeX, ※ Text/Word, ※ RIS, ※ EndNote (xml)