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RIS citation export for WEC3O02: The Phase-Locked Loop Algorithm of the Function Generation/Controller

TY - CONF
AU - Magrans de Abril, M.
AU - King, Q.
AU - Murillo-Garcia, R.
ED - Corvetti, Lou
ED - Riches, Kathleen
ED - Schaa, Volker RW
TI - The Phase-Locked Loop Algorithm of the Function Generation/Controller
J2 - Proc. of ICALEPCS2015, Melbourne, Australia, 17-23 October 2015
C1 - Melbourne, Australia
T2 - International Conference on Accelerator and Large Experimental Physics Control Systems
T3 - 15
LA - english
AB - This paper describes the phase-locked loop algorithms that are used by the real-time power converter controllers at CERN. The algorithms allow the recovery of the machine time and events received by an embedded controller through WorldFIP or Ethernet-based fieldbuses. During normal operation, the algorithm provides less than 10 μs of time precision and 0.5 μs of clock jitter for the WorldFIP case, and less than 2.5 μs of time precision and 40 ns of clock jitter for the Ethernet case.
PB - JACoW
CP - Geneva, Switzerland
SP - 624
EP - 628
KW - controls
KW - timing
KW - Ethernet
KW - network
KW - real-time
DA - 2015/12
PY - 2015
SN - 978-3-95450-148-9
DO - 10.18429/JACoW-ICALEPCS2015-WEC3O02
UR - http://jacow.org/icalepcs2015/papers/wec3o02.pdf
ER -