ICALEPCS2013 - List of Authors (Van der Bij, E.)

Paper

Title

Page

CERN's FMC Kit

1020

E. Van der Bij, M. Cattin, E. Gousiou, J. Serrano, T. Włostowski
CERN, Geneva, Switzerland

In the frame of the renovation of controls and data acquisition electronics for accelerators, the BE-CO-HT section at CERN has designed a kit based on carriers and mezzanines following the FPGA Mezzanine Card (FMC, VITA 57) standard. Carriers exist in VME64x and PCIe form factors, with a PXIe carrier underway. Mezzanines include an Analog to Digital Converter (ADC), a Time to Digital Converter (TDC) and a fine delay generator. All of the designs are licensed under the CERN Open Hardware Licence (OHL) and commercialized by companies. The paper discusses the benefits of this carrier-mezzanine strategy and of the Open Hardware based commercial paradigm, along with performance figures and plans for the future.

Slides WECOCB01 [3.300 MB]

THCOCA02

White Rabbit Status and Prospects

1445

J. Serrano, G. Daniluk, M. Lipiński, E. Van der Bij, T. Włostowski
CERN, Geneva, Switzerland
D.H. Beck, J. Hoffmann, M. Kreider, C. Prados, S. Rauch, W.W. Terpstra, M. Zweig
GSI, Darmstadt, Germany

The White Rabbit (WR) project started off to provide a sequencing and synchronization solution for the needs of CERN and GSI. Since then, many other users have adopted it to solve problems in the domain of distributed hard real-time systems. The paper discusses the current performance of WR hardware, along with present and foreseen applications. It also describes current efforts to standardize WR under IEEE 1588 and recent developments on reliability of timely data distribution. Then it analyzes the role of companies and the commercial Open Hardware paradigm, finishing with an outline of future plans.

Slides THCOCA02 [7.955 MB]

Paper	Title	Page
WECOCB01	CERN's FMC Kit	1020
	E. Van der Bij, M. Cattin, E. Gousiou, J. Serrano, T. Włostowski CERN, Geneva, Switzerland
	In the frame of the renovation of controls and data acquisition electronics for accelerators, the BE-CO-HT section at CERN has designed a kit based on carriers and mezzanines following the FPGA Mezzanine Card (FMC, VITA 57) standard. Carriers exist in VME64x and PCIe form factors, with a PXIe carrier underway. Mezzanines include an Analog to Digital Converter (ADC), a Time to Digital Converter (TDC) and a fine delay generator. All of the designs are licensed under the CERN Open Hardware Licence (OHL) and commercialized by companies. The paper discusses the benefits of this carrier-mezzanine strategy and of the Open Hardware based commercial paradigm, along with performance figures and plans for the future.
	Slides WECOCB01 [3.300 MB]

THCOCA02	White Rabbit Status and Prospects	1445
	J. Serrano, G. Daniluk, M. Lipiński, E. Van der Bij, T. Włostowski CERN, Geneva, Switzerland D.H. Beck, J. Hoffmann, M. Kreider, C. Prados, S. Rauch, W.W. Terpstra, M. Zweig GSI, Darmstadt, Germany
	The White Rabbit (WR) project started off to provide a sequencing and synchronization solution for the needs of CERN and GSI. Since then, many other users have adopted it to solve problems in the domain of distributed hard real-time systems. The paper discusses the current performance of WR hardware, along with present and foreseen applications. It also describes current efforts to standardize WR under IEEE 1588 and recent developments on reliability of timely data distribution. Then it analyzes the role of companies and the commercial Open Hardware paradigm, finishing with an outline of future plans.
	Slides THCOCA02 [7.955 MB]