Author: Gousiou, E.
Paper Title Page
WECOCB01 CERN's FMC Kit 1020
 
  • E. Van der Bij, M. Cattin, E. Gousiou, J. Serrano, T. Włostowski
    CERN, Geneva, Switzerland
 
  In the frame of the renovation of controls and data acquisition electronics for accelerators, the BE-CO-HT section at CERN has designed a kit based on carriers and mezzanines following the FPGA Mezzanine Card (FMC, VITA 57) standard. Carriers exist in VME64x and PCIe form factors, with a PXIe carrier underway. Mezzanines include an Analog to Digital Converter (ADC), a Time to Digital Converter (TDC) and a fine delay generator. All of the designs are licensed under the CERN Open Hardware Licence (OHL) and commercialized by companies. The paper discusses the benefits of this carrier-mezzanine strategy and of the Open Hardware based commercial paradigm, along with performance figures and plans for the future.  
slides icon Slides WECOCB01 [3.300 MB]