ICALEPCS2013 - List of Authors (Baron, R.A.)

Paper

Title

Page

Development of an Open-Source Hardware Platform for Sirius BPM and Orbit Feedback

1036

D.O. Tavares, R.A. Baron, F.H. Cardoso, S.R. Marques, L.M. Russo
LNLS, Campinas, Brazil
A.P. Byszuk, G. Kasprowicz, A.J. Wojenski
Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland

The Brazilian Synchrotron Light Laboratory (LNLS) is developing a BPM and orbit feedback system for Sirius, the new low emmitance synchrotron light source under construction in Brazil. In that context, 3 open-source boards and accompanying low-level firmware/software were developed in cooperation with the Warsaw University of Technology (WUT) to serve as hardware platform for the BPM data acquisition and digital signal processing platform as well as orbit feedback data distributor: (i) FPGA board with 2 high-pin count FMC slots in PICMG AMC form factor; (ii) 4-channel 16-bit 130 MS/s ADC board in ANSI/VITA FMC form factor; (iii) 4-channel 16-bit 250 MS/s ADC board in ANSI/VITA FMC form factor. The experience of integrating the system prototype in a COTS MicroTCA.4 crate will be reported, as well as the planned developments.

Slides WECOCB07 [4.137 MB]

Paper	Title	Page
WECOCB07	Development of an Open-Source Hardware Platform for Sirius BPM and Orbit Feedback	1036
	D.O. Tavares, R.A. Baron, F.H. Cardoso, S.R. Marques, L.M. Russo LNLS, Campinas, Brazil A.P. Byszuk, G. Kasprowicz, A.J. Wojenski Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
	The Brazilian Synchrotron Light Laboratory (LNLS) is developing a BPM and orbit feedback system for Sirius, the new low emmitance synchrotron light source under construction in Brazil. In that context, 3 open-source boards and accompanying low-level firmware/software were developed in cooperation with the Warsaw University of Technology (WUT) to serve as hardware platform for the BPM data acquisition and digital signal processing platform as well as orbit feedback data distributor: (i) FPGA board with 2 high-pin count FMC slots in PICMG AMC form factor; (ii) 4-channel 16-bit 130 MS/s ADC board in ANSI/VITA FMC form factor; (iii) 4-channel 16-bit 250 MS/s ADC board in ANSI/VITA FMC form factor. The experience of integrating the system prototype in a COTS MicroTCA.4 crate will be reported, as well as the planned developments.
	Slides WECOCB07 [4.137 MB]