Author: Kasprowicz, G.
Paper Title Page
MOPC09 Development of the Sirius RF BPM Electronics 63
 
  • D.O. Tavares, R.A. Baron, F.H. Cardoso, S.R. Marques, J.L.B. Neto, L.M. Russo
    LNLS, Campinas, Brazil
  • A.P. Byszuk, G. Kasprowicz, A.J. Wojenski
    Warsaw University of Technology, Institute of Electronic Systems, Warsaw, Poland
  
  A BPM sys­tem has been de­vel­oped for the new low em­mi­tance 3 GeV Brazil­ian syn­chro­tron light source, Sir­ius. The Sir­ius BPM elec­tron­ics is a mod­u­lar sys­tem based on a PICMG(R) Mi­croTCA.4 plat­form using ADC mez­za­nine cards in ANSI/VITA 57.1 FMC form fac­tor and stand­alone RF front-end boards. It has been de­signed under the CERN Open Hard­ware Li­cense (OHL) in a col­lab­o­ra­tion be­tween Brazil­ian Syn­chro­tron Light Lab­o­ra­tory (LNLS) and War­saw Uni­ver­sity of Tech­nol­ogy (WUT). This paper pre­sents: i) over­all ar­chi­tec­ture of the BPM sys­tem; ii) per­for­mance eval­u­a­tion of the first pro­to­type of the BPM elec­tron­ics com­pre­hend­ing beam cur­rent, fill­ing pat­tern and tem­per­a­ture de­pen­den­cies as well as res­o­lu­tion vs. beam cur­rent; and iii) pre­lim­i­nary re­sults with beam at LNLS's UVX stor­age ring.  
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